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ARM: dts: add CPU nodes for Exynos4 SoCs 

Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation
when topology is read from DT") fixed GIC driver to filter cluster ID
from values returned by cpu_logical_map() for SoCs having registers
mapped without per-CPU banking making it is possible to add CPU nodes
for Exynos4 SoCs.  In case of Exynos SoCs these CPU nodes are also
required by future changes adding initialization of cpuidle states in
Exynos cpuidle driver through DT.

Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC).

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz 2014-09-25 17:40:14 +09:00 committed by Kukjin Kim
parent 752d3a23d1
commit e540920cf2
3 changed files with 63 additions and 0 deletions
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17
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -31,6 +31,23 @@
pinctrl2 = &pinctrl_2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@900 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x900>;
};
cpu@901 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x901>;
};
};
pmu_system_controller: system-controller@10020000 {
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";

17
arch/arm/boot/dts/exynos4212.dtsi
View File

@ -22,6 +22,23 @@
/ {
compatible = "samsung,exynos4212", "samsung,exynos4";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@A00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
};
cpu@A01 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA01>;
};
};
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <18>;
};

29
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -22,6 +22,35 @@
/ {
compatible = "samsung,exynos4412", "samsung,exynos4";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@A00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
};
cpu@A01 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA01>;
};
cpu@A02 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA02>;
};
cpu@A03 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA03>;
};
};
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <20>;
};