arm: dts: mt7623: add mt7530 switch to mt7623a.dtsi

The MT7530 switch is included as a part of the multi-chip module on the
MT7623AI SoC. Add it to mt7623a.dtsi and adjust DTs that call mt7623a.dtsi.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Link: https://lore.kernel.org/r/20230210182505.24597-3-arinc.unal@arinc9.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Arınç ÜNAL 2023-02-10 21:25:02 +03:00 committed by Matthias Brugger
parent f847a3a8c6
commit e5240c35fa
3 changed files with 116 additions and 128 deletions

View File

@ -112,75 +112,32 @@
status = "okay";
};
&gmac0 {
status = "okay";
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
&eth {
status = "okay";
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7530";
reg = <0>;
mediatek,mcm;
resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
reset-names = "mcm";
core-supply = <&mt6323_vpa_reg>;
io-supply = <&mt6323_vemc3v3_reg>;
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
status = "okay";
label = "lan0";
};
port@1 {
reg = <1>;
status = "okay";
label = "lan1";
};
port@2 {
reg = <2>;
status = "okay";
label = "lan2";
};
port@3 {
reg = <3>;
status = "okay";
label = "lan3";
};
port@4 {
reg = <4>;
status = "okay";
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
};

View File

@ -116,75 +116,32 @@
status = "okay";
};
&gmac0 {
status = "okay";
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
&eth {
status = "okay";
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7530";
reg = <0>;
mediatek,mcm;
resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
reset-names = "mcm";
core-supply = <&mt6323_vpa_reg>;
io-supply = <&mt6323_vemc3v3_reg>;
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
status = "okay";
label = "lan0";
};
port@1 {
reg = <1>;
status = "okay";
label = "lan1";
};
port@2 {
reg = <2>;
status = "okay";
label = "lan2";
};
port@3 {
reg = <3>;
status = "okay";
label = "lan3";
};
port@4 {
reg = <4>;
status = "okay";
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
};

View File

@ -17,8 +17,82 @@
power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
};
&gmac0 {
status = "okay";
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
&eth {
status = "okay";
power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch0: switch@0 {
compatible = "mediatek,mt7530";
reg = <0>;
mediatek,mcm;
resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
reset-names = "mcm";
core-supply = <&mt6323_vpa_reg>;
io-supply = <&mt6323_vemc3v3_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "disabled";
reg = <0>;
label = "swp0";
};
port@1 {
status = "disabled";
reg = <1>;
label = "swp1";
};
port@2 {
status = "disabled";
reg = <2>;
label = "swp2";
};
port@3 {
status = "disabled";
reg = <3>;
label = "swp3";
};
port@4 {
status = "disabled";
reg = <4>;
label = "swp4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
};
&nandc {