drm/i915: there's no cxsr on ilk
Already discovered in
commit 5a117db77e
Author: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date: Thu Jan 5 09:34:29 2012 -0200
drm/i915: there is no pipe CxSR on ironlake
but we've failed to rip out the code from the ironlake specific code.
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4652,16 +4652,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
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if (is_lvds && has_reduced_clock && i915_powersave) {
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if (is_lvds && has_reduced_clock && i915_powersave) {
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I915_WRITE(intel_crtc->pch_pll->fp1_reg, fp2);
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I915_WRITE(intel_crtc->pch_pll->fp1_reg, fp2);
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intel_crtc->lowfreq_avail = true;
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intel_crtc->lowfreq_avail = true;
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if (HAS_PIPE_CXSR(dev)) {
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DRM_DEBUG_KMS("enabling CxSR downclocking\n");
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pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
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}
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} else {
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} else {
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I915_WRITE(intel_crtc->pch_pll->fp1_reg, fp);
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I915_WRITE(intel_crtc->pch_pll->fp1_reg, fp);
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if (HAS_PIPE_CXSR(dev)) {
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DRM_DEBUG_KMS("disabling CxSR downclocking\n");
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pipeconf &= ~PIPECONF_CXSR_DOWNCLOCK;
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}
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}
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}
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}
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}
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