arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
TV path consist of following interconnected components: - DECON_TV - display controller, - HDMI - video signal converter RGB / HDMI, - MHL - video signal converter HDMI / MHL, - DDC - i2c slave device for EDID reading (on hsi2c_11 bus). Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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@ -278,6 +278,22 @@
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};
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};
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&decon_tv {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tv_to_hdmi: endpoint {
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remote-endpoint = <&hdmi_to_tv>;
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};
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};
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};
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};
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&dsi {
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status = "okay";
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vddcore-supply = <&ldo6_reg>;
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@ -301,6 +317,33 @@
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};
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};
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&hdmi {
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hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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vdd-supply = <&ldo6_reg>;
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vdd_osc-supply = <&ldo7_reg>;
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vdd_pll-supply = <&ldo6_reg>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_to_tv: endpoint {
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remote-endpoint = <&tv_to_hdmi>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi_to_mhl: endpoint {
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remote-endpoint = <&mhl_to_hdmi>;
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};
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};
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};
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};
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&hsi2c_0 {
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status = "okay";
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clock-frequency = <2500000>;
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@ -702,6 +745,28 @@
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};
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};
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&hsi2c_7 {
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status = "okay";
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sii8620@39 {
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reg = <0x39>;
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compatible = "sil,sii8620";
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cvcc10-supply = <&ldo36_reg>;
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iovcc18-supply = <&ldo34_reg>;
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interrupt-parent = <&gpf0>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
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clocks = <&pmu_system_controller 0>;
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clock-names = "xtal";
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port {
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mhl_to_hdmi: endpoint {
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remote-endpoint = <&hdmi_to_mhl>;
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};
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};
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};
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};
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&hsi2c_8 {
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status = "okay";
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@ -745,6 +810,10 @@
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};
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};
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&hsi2c_11 {
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status = "okay";
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};
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&i2s0 {
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status = "okay";
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};
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