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ath9k: Set correct peak detect threshold 

The value is different for PCOEM cards and AR955x/AR953x.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Sujith Manoharan 2015-01-28 17:54:25 +05:30 committed by Kalle Valo
parent 7a722ebc59
commit e4e292f3c7
1 changed files with 11 additions and 4 deletions
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15
drivers/net/wireless/ath/ath9k/ar9003_calib.c
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@ -1203,7 +1203,12 @@ static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)
static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g) static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
{ {
int offset[8] = {0}, total = 0, test; int offset[8] = {0}, total = 0, test;
int agc_out, i; int agc_out, i, peak_detect_threshold;
if (AR_SREV_9550(ah) || AR_SREV_9531(ah))
peak_detect_threshold = 8;
else
peak_detect_threshold = 0;
/* /*
* Turn off LNA/SW. * Turn off LNA/SW.
@ -1244,13 +1249,15 @@ static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, 0x0); AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, 0x0);
if (AR_SREV_9003_PCOEM(ah)) { if (AR_SREV_9003_PCOEM(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah)) {
if (is_2g) if (is_2g)
REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR, 0x0); AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR,
peak_detect_threshold);
else else
REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR, 0x0); AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR,
peak_detect_threshold);
} }
for (i = 6; i > 0; i--) { for (i = 6; i > 0; i--) {