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arm64: tegra: Device tree changes for v4.13-rc1 

This adds the CCPLEX cluster on Tegra186, which is used to initiate CPU
 frequency and voltage transitions.
 
 Also included is a bit of cleanup for PCI related device tree content,
 in preparation for a future DTC release that has additional checks for
 the PCI bus.
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Merge tag 'tegra-for-4.13-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

arm64: tegra: Device tree changes for v4.13-rc1

This adds the CCPLEX cluster on Tegra186, which is used to initiate CPU
frequency and voltage transitions.

Also included is a bit of cleanup for PCI related device tree content,
in preparation for a future DTC release that has additional checks for
the PCI bus.

* tag 'tegra-for-4.13-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: dts: nvidia: fix PCI bus dtc warnings
  arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-06-18 21:02:19 -07:00
parent 010da09e26 475d99fc21
commit e4b79c3b6b
4 changed files with 14 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/nvidia/tegra132.dtsi
View File

@ -12,7 +12,7 @@
#address-cells = <2>;
#size-cells = <2>;
pcie-controller@01003000 {
pcie@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
@ -55,6 +55,7 @@
device_type = "pci";
assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
reg = <0x000800 0 0 0 0>;
bus-range = <0x00 0xff>;
status = "disabled";
#address-cells = <3>;
@ -68,6 +69,7 @@
device_type = "pci";
assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
reg = <0x001000 0 0 0 0>;
bus-range = <0x00 0xff>;
status = "disabled";
#address-cells = <3>;

7
arch/arm64/boot/dts/nvidia/tegra186.dtsi
View File

@ -348,6 +348,13 @@
reg-names = "pmc", "wake", "aotag", "scratch";
};
ccplex@e000000 {
compatible = "nvidia,tegra186-ccplex-cluster";
reg = <0x0 0x0e000000 0x0 0x3fffff>;
nvidia,bpmp = <&bpmp>;
};
gpu@17000000 {
compatible = "nvidia,gp10b";
reg = <0x0 0x17000000 0x0 0x1000000>,

2
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
View File

@ -7,7 +7,7 @@
model = "NVIDIA Jetson TX1 Developer Kit";
compatible = "nvidia,p2371-2180", "nvidia,tegra210";
pcie-controller@01003000 {
pcie@1003000 {
status = "okay";
avdd-pll-uerefe-supply = <&avdd_1v05_pll>;

4
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View File

@ -11,7 +11,7 @@
#address-cells = <2>;
#size-cells = <2>;
pcie-controller@01003000 {
pcie@1003000 {
compatible = "nvidia,tegra210-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
@ -51,6 +51,7 @@
device_type = "pci";
assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
reg = <0x000800 0 0 0 0>;
bus-range = <0x00 0xff>;
status = "disabled";
#address-cells = <3>;
@ -64,6 +65,7 @@
device_type = "pci";
assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
reg = <0x001000 0 0 0 0>;
bus-range = <0x00 0xff>;
status = "disabled";
#address-cells = <3>;