perf tools: Move powerpc barrier.h stuff to tools/arch/powerpc/include/asm/barrier.h
We will need it for atomic.h, so move it from the ad-hoc tools/perf/ place to a tools/ subset of the kernel arch/ hierarchy. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Borislav Petkov <bp@suse.de> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Stephane Eranian <eranian@google.com> Link: http://lkml.kernel.org/n/tip-pk6f5x9vh8k2ebzhh9uj5wo2@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
parent
361c564eef
commit
e43a19c9c2
|
@ -0,0 +1,29 @@
|
|||
/*
|
||||
* Copied from the kernel sources:
|
||||
*
|
||||
* Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
|
||||
*/
|
||||
#ifndef _TOOLS_LINUX_ASM_POWERPC_BARRIER_H
|
||||
#define _TOOLS_LINUX_ASM_POWERPC_BARRIER_H
|
||||
|
||||
/*
|
||||
* Memory barrier.
|
||||
* The sync instruction guarantees that all memory accesses initiated
|
||||
* by this processor have been performed (with respect to all other
|
||||
* mechanisms that access memory). The eieio instruction is a barrier
|
||||
* providing an ordering (separately) for (a) cacheable stores and (b)
|
||||
* loads and stores to non-cacheable memory (e.g. I/O devices).
|
||||
*
|
||||
* mb() prevents loads and stores being reordered across this point.
|
||||
* rmb() prevents loads being reordered across this point.
|
||||
* wmb() prevents stores being reordered across this point.
|
||||
*
|
||||
* *mb() variants without smp_ prefix must order all types of memory
|
||||
* operations with one another. sync is the only instruction sufficient
|
||||
* to do this.
|
||||
*/
|
||||
#define mb() __asm__ __volatile__ ("sync" : : : "memory")
|
||||
#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
|
||||
#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
|
||||
|
||||
#endif /* _TOOLS_LINUX_ASM_POWERPC_BARRIER_H */
|
|
@ -1,3 +1,5 @@
|
|||
#if defined(__i386__) || defined(__x86_64__)
|
||||
#include "../../arch/x86/include/asm/barrier.h"
|
||||
#elif defined(__powerpc__)
|
||||
#include "../../arch/powerpc/include/asm/barrier.h"
|
||||
#endif
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
tools/perf
|
||||
tools/arch/powerpc/include/asm/barrier.h
|
||||
tools/arch/x86/include/asm/barrier.h
|
||||
tools/scripts
|
||||
tools/build
|
||||
|
|
|
@ -38,9 +38,6 @@
|
|||
|
||||
#ifdef __powerpc__
|
||||
#include "../../arch/powerpc/include/uapi/asm/unistd.h"
|
||||
#define mb() asm volatile ("sync" ::: "memory")
|
||||
#define wmb() asm volatile ("sync" ::: "memory")
|
||||
#define rmb() asm volatile ("sync" ::: "memory")
|
||||
#define CPUINFO_PROC {"cpu"}
|
||||
#endif
|
||||
|
||||
|
|
Loading…
Reference in New Issue