Merge branch 'mlx5-next into rdma.git for-next
From git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux For dependencies needed in the next ODP patches. * branch 'mlx5-next': net/mlx5: Set ODP SRQ support in firmware net/mlx5: Add XRC transport to ODP device capabilities layout
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commit
e431a80a54
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@ -459,6 +459,53 @@ static int handle_hca_cap_atomic(struct mlx5_core_dev *dev)
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return err;
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}
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static int handle_hca_cap_odp(struct mlx5_core_dev *dev)
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{
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void *set_ctx;
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void *set_hca_cap;
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int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
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int err;
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if (!MLX5_CAP_GEN(dev, pg))
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return 0;
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err = mlx5_core_get_caps(dev, MLX5_CAP_ODP);
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if (err)
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return err;
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/**
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* If all bits are cleared we shouldn't try to set it
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* or we might fail while trying to access a reserved bit.
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*/
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if (!(MLX5_CAP_ODP_MAX(dev, ud_odp_caps.srq_receive) ||
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MLX5_CAP_ODP_MAX(dev, rc_odp_caps.srq_receive) ||
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MLX5_CAP_ODP_MAX(dev, xrc_odp_caps.srq_receive)))
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return 0;
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set_ctx = kzalloc(set_sz, GFP_KERNEL);
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if (!set_ctx)
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return -ENOMEM;
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set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);
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memcpy(set_hca_cap, dev->caps.hca_cur[MLX5_CAP_ODP],
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MLX5_ST_SZ_BYTES(odp_cap));
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/* set ODP SRQ support for RC/UD and XRC transports */
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MLX5_SET(odp_cap, set_hca_cap, ud_odp_caps.srq_receive,
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(MLX5_CAP_ODP_MAX(dev, ud_odp_caps.srq_receive)));
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MLX5_SET(odp_cap, set_hca_cap, rc_odp_caps.srq_receive,
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(MLX5_CAP_ODP_MAX(dev, rc_odp_caps.srq_receive)));
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MLX5_SET(odp_cap, set_hca_cap, xrc_odp_caps.srq_receive,
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(MLX5_CAP_ODP_MAX(dev, xrc_odp_caps.srq_receive)));
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err = set_caps(dev, set_ctx, set_sz, MLX5_SET_HCA_CAP_OP_MOD_ODP);
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kfree(set_ctx);
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return err;
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}
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static int handle_hca_cap(struct mlx5_core_dev *dev)
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{
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void *set_ctx = NULL;
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@ -931,6 +978,12 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
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goto reclaim_boot_pages;
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}
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err = handle_hca_cap_odp(dev);
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if (err) {
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dev_err(&pdev->dev, "handle_hca_cap_odp failed\n");
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goto reclaim_boot_pages;
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}
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err = mlx5_satisfy_startup_pages(dev, 0);
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if (err) {
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dev_err(&pdev->dev, "failed to allocate init pages\n");
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@ -1201,6 +1201,9 @@ enum mlx5_qcam_feature_groups {
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#define MLX5_CAP_ODP(mdev, cap)\
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MLX5_GET(odp_cap, mdev->caps.hca_cur[MLX5_CAP_ODP], cap)
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#define MLX5_CAP_ODP_MAX(mdev, cap)\
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MLX5_GET(odp_cap, mdev->caps.hca_max[MLX5_CAP_ODP], cap)
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#define MLX5_CAP_VECTOR_CALC(mdev, cap) \
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MLX5_GET(vector_calc_cap, \
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mdev->caps.hca_cur[MLX5_CAP_VECTOR_CALC], cap)
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@ -72,6 +72,7 @@ enum {
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enum {
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MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
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MLX5_SET_HCA_CAP_OP_MOD_ODP = 0x2,
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MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
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};
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@ -831,7 +832,9 @@ struct mlx5_ifc_odp_cap_bits {
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struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
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u8 reserved_at_e0[0x720];
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struct mlx5_ifc_odp_per_transport_service_cap_bits xrc_odp_caps;
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u8 reserved_at_100[0x700];
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};
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struct mlx5_ifc_calc_op {
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