drm/radeon: Changing number of compute pipe lines
The current CP firmware can handle Usermode Queues only on MEC1. To reflect this firmware change, this commit reduces number of compute pipelines to 4 - 1, from 8 - 1 (the first pipeline is allocated for kgd). Signed-off-by: Ben Goz <ben.goz@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@amd.com> Cc: stable@vger.kernel.org
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@ -153,7 +153,7 @@ void radeon_kfd_device_init(struct radeon_device *rdev)
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.compute_vmid_bitmap = 0xFF00,
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.first_compute_pipe = 1,
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.compute_pipe_count = 8 - 1,
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.compute_pipe_count = 4 - 1,
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};
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radeon_doorbell_get_kfd_info(rdev,
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