V4L/DVB: V4L: dm644x_ccdc: Add Suspend/Resume Support
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Muralidharan Karicheri <mkaricheri@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Vaibhav Hiremath
Mauro Carvalho Chehab
parent
aa2dc90348
commit
e333bab73e
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@ -101,6 +101,9 @@ static u32 ccdc_raw_bayer_pix_formats[] =
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static u32 ccdc_raw_yuv_pix_formats[] =
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{V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV};
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/* CCDC Save/Restore context */
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static u32 ccdc_ctx[CCDC_REG_END / sizeof(u32)];
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/* register access routines */
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static inline u32 regr(u32 offset)
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{
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@ -846,6 +849,87 @@ static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
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return 0;
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}
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static void ccdc_save_context(void)
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{
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ccdc_ctx[CCDC_PCR >> 2] = regr(CCDC_PCR);
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ccdc_ctx[CCDC_SYN_MODE >> 2] = regr(CCDC_SYN_MODE);
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ccdc_ctx[CCDC_HD_VD_WID >> 2] = regr(CCDC_HD_VD_WID);
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ccdc_ctx[CCDC_PIX_LINES >> 2] = regr(CCDC_PIX_LINES);
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ccdc_ctx[CCDC_HORZ_INFO >> 2] = regr(CCDC_HORZ_INFO);
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ccdc_ctx[CCDC_VERT_START >> 2] = regr(CCDC_VERT_START);
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ccdc_ctx[CCDC_VERT_LINES >> 2] = regr(CCDC_VERT_LINES);
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ccdc_ctx[CCDC_CULLING >> 2] = regr(CCDC_CULLING);
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ccdc_ctx[CCDC_HSIZE_OFF >> 2] = regr(CCDC_HSIZE_OFF);
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ccdc_ctx[CCDC_SDOFST >> 2] = regr(CCDC_SDOFST);
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ccdc_ctx[CCDC_SDR_ADDR >> 2] = regr(CCDC_SDR_ADDR);
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ccdc_ctx[CCDC_CLAMP >> 2] = regr(CCDC_CLAMP);
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ccdc_ctx[CCDC_DCSUB >> 2] = regr(CCDC_DCSUB);
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ccdc_ctx[CCDC_COLPTN >> 2] = regr(CCDC_COLPTN);
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ccdc_ctx[CCDC_BLKCMP >> 2] = regr(CCDC_BLKCMP);
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ccdc_ctx[CCDC_FPC >> 2] = regr(CCDC_FPC);
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ccdc_ctx[CCDC_FPC_ADDR >> 2] = regr(CCDC_FPC_ADDR);
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ccdc_ctx[CCDC_VDINT >> 2] = regr(CCDC_VDINT);
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ccdc_ctx[CCDC_ALAW >> 2] = regr(CCDC_ALAW);
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ccdc_ctx[CCDC_REC656IF >> 2] = regr(CCDC_REC656IF);
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ccdc_ctx[CCDC_CCDCFG >> 2] = regr(CCDC_CCDCFG);
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ccdc_ctx[CCDC_FMTCFG >> 2] = regr(CCDC_FMTCFG);
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ccdc_ctx[CCDC_FMT_HORZ >> 2] = regr(CCDC_FMT_HORZ);
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ccdc_ctx[CCDC_FMT_VERT >> 2] = regr(CCDC_FMT_VERT);
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ccdc_ctx[CCDC_FMT_ADDR0 >> 2] = regr(CCDC_FMT_ADDR0);
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ccdc_ctx[CCDC_FMT_ADDR1 >> 2] = regr(CCDC_FMT_ADDR1);
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ccdc_ctx[CCDC_FMT_ADDR2 >> 2] = regr(CCDC_FMT_ADDR2);
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ccdc_ctx[CCDC_FMT_ADDR3 >> 2] = regr(CCDC_FMT_ADDR3);
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ccdc_ctx[CCDC_FMT_ADDR4 >> 2] = regr(CCDC_FMT_ADDR4);
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ccdc_ctx[CCDC_FMT_ADDR5 >> 2] = regr(CCDC_FMT_ADDR5);
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ccdc_ctx[CCDC_FMT_ADDR6 >> 2] = regr(CCDC_FMT_ADDR6);
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ccdc_ctx[CCDC_FMT_ADDR7 >> 2] = regr(CCDC_FMT_ADDR7);
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ccdc_ctx[CCDC_PRGEVEN_0 >> 2] = regr(CCDC_PRGEVEN_0);
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ccdc_ctx[CCDC_PRGEVEN_1 >> 2] = regr(CCDC_PRGEVEN_1);
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ccdc_ctx[CCDC_PRGODD_0 >> 2] = regr(CCDC_PRGODD_0);
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ccdc_ctx[CCDC_PRGODD_1 >> 2] = regr(CCDC_PRGODD_1);
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ccdc_ctx[CCDC_VP_OUT >> 2] = regr(CCDC_VP_OUT);
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}
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static void ccdc_restore_context(void)
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{
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regw(ccdc_ctx[CCDC_SYN_MODE >> 2], CCDC_SYN_MODE);
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regw(ccdc_ctx[CCDC_HD_VD_WID >> 2], CCDC_HD_VD_WID);
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regw(ccdc_ctx[CCDC_PIX_LINES >> 2], CCDC_PIX_LINES);
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regw(ccdc_ctx[CCDC_HORZ_INFO >> 2], CCDC_HORZ_INFO);
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regw(ccdc_ctx[CCDC_VERT_START >> 2], CCDC_VERT_START);
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regw(ccdc_ctx[CCDC_VERT_LINES >> 2], CCDC_VERT_LINES);
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regw(ccdc_ctx[CCDC_CULLING >> 2], CCDC_CULLING);
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regw(ccdc_ctx[CCDC_HSIZE_OFF >> 2], CCDC_HSIZE_OFF);
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regw(ccdc_ctx[CCDC_SDOFST >> 2], CCDC_SDOFST);
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regw(ccdc_ctx[CCDC_SDR_ADDR >> 2], CCDC_SDR_ADDR);
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regw(ccdc_ctx[CCDC_CLAMP >> 2], CCDC_CLAMP);
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regw(ccdc_ctx[CCDC_DCSUB >> 2], CCDC_DCSUB);
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regw(ccdc_ctx[CCDC_COLPTN >> 2], CCDC_COLPTN);
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regw(ccdc_ctx[CCDC_BLKCMP >> 2], CCDC_BLKCMP);
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regw(ccdc_ctx[CCDC_FPC >> 2], CCDC_FPC);
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regw(ccdc_ctx[CCDC_FPC_ADDR >> 2], CCDC_FPC_ADDR);
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regw(ccdc_ctx[CCDC_VDINT >> 2], CCDC_VDINT);
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regw(ccdc_ctx[CCDC_ALAW >> 2], CCDC_ALAW);
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regw(ccdc_ctx[CCDC_REC656IF >> 2], CCDC_REC656IF);
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regw(ccdc_ctx[CCDC_CCDCFG >> 2], CCDC_CCDCFG);
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regw(ccdc_ctx[CCDC_FMTCFG >> 2], CCDC_FMTCFG);
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regw(ccdc_ctx[CCDC_FMT_HORZ >> 2], CCDC_FMT_HORZ);
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regw(ccdc_ctx[CCDC_FMT_VERT >> 2], CCDC_FMT_VERT);
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regw(ccdc_ctx[CCDC_FMT_ADDR0 >> 2], CCDC_FMT_ADDR0);
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regw(ccdc_ctx[CCDC_FMT_ADDR1 >> 2], CCDC_FMT_ADDR1);
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regw(ccdc_ctx[CCDC_FMT_ADDR2 >> 2], CCDC_FMT_ADDR2);
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regw(ccdc_ctx[CCDC_FMT_ADDR3 >> 2], CCDC_FMT_ADDR3);
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regw(ccdc_ctx[CCDC_FMT_ADDR4 >> 2], CCDC_FMT_ADDR4);
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regw(ccdc_ctx[CCDC_FMT_ADDR5 >> 2], CCDC_FMT_ADDR5);
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regw(ccdc_ctx[CCDC_FMT_ADDR6 >> 2], CCDC_FMT_ADDR6);
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regw(ccdc_ctx[CCDC_FMT_ADDR7 >> 2], CCDC_FMT_ADDR7);
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regw(ccdc_ctx[CCDC_PRGEVEN_0 >> 2], CCDC_PRGEVEN_0);
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regw(ccdc_ctx[CCDC_PRGEVEN_1 >> 2], CCDC_PRGEVEN_1);
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regw(ccdc_ctx[CCDC_PRGODD_0 >> 2], CCDC_PRGODD_0);
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regw(ccdc_ctx[CCDC_PRGODD_1 >> 2], CCDC_PRGODD_1);
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regw(ccdc_ctx[CCDC_VP_OUT >> 2], CCDC_VP_OUT);
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regw(ccdc_ctx[CCDC_PCR >> 2], CCDC_PCR);
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}
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static struct ccdc_hw_device ccdc_hw_dev = {
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.name = "DM6446 CCDC",
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.owner = THIS_MODULE,
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@ -954,10 +1038,40 @@ static int dm644x_ccdc_remove(struct platform_device *pdev)
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return 0;
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}
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static int dm644x_ccdc_suspend(struct device *dev)
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{
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/* Save CCDC context */
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ccdc_save_context();
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/* Disable CCDC */
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ccdc_enable(0);
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/* Disable both master and slave clock */
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clk_disable(ccdc_cfg.mclk);
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clk_disable(ccdc_cfg.sclk);
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return 0;
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}
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static int dm644x_ccdc_resume(struct device *dev)
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{
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/* Enable both master and slave clock */
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clk_enable(ccdc_cfg.mclk);
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clk_enable(ccdc_cfg.sclk);
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/* Restore CCDC context */
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ccdc_restore_context();
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return 0;
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}
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static const struct dev_pm_ops dm644x_ccdc_pm_ops = {
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.suspend = dm644x_ccdc_suspend,
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.resume = dm644x_ccdc_resume,
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};
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static struct platform_driver dm644x_ccdc_driver = {
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.driver = {
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.name = "dm644x_ccdc",
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.owner = THIS_MODULE,
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.pm = &dm644x_ccdc_pm_ops,
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},
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.remove = __devexit_p(dm644x_ccdc_remove),
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.probe = dm644x_ccdc_probe,
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@ -59,7 +59,7 @@
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#define CCDC_PRGODD_0 0x8c
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#define CCDC_PRGODD_1 0x90
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#define CCDC_VP_OUT 0x94
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#define CCDC_REG_END 0x98
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/***************************************************************
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* Define for various register bit mask and shifts for CCDC
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