iommu/arm-smmu: Enlarge STRTAB_L1_SZ_SHIFT to support larger sidsize
Because we will choose the minimum value between STRTAB_L1_SZ_SHIFT and IDR1.SIDSIZE, so enlarge STRTAB_L1_SZ_SHIFT will not impact the platforms whose IDR1.SIDSIZE is smaller than old STRTAB_L1_SZ_SHIFT value. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -199,9 +199,10 @@
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* Stream table.
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*
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* Linear: Enough to cover 1 << IDR1.SIDSIZE entries
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* 2lvl: 8k L1 entries, 256 lazy entries per table (each table covers a PCI bus)
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* 2lvl: 128k L1 entries,
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* 256 lazy entries per table (each table covers a PCI bus)
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*/
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#define STRTAB_L1_SZ_SHIFT 16
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#define STRTAB_L1_SZ_SHIFT 20
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#define STRTAB_SPLIT 8
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#define STRTAB_L1_DESC_DWORDS 1
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