drivers: net: xgene: fix register offset
This patch fixes SG_RX_DV_GATE_REG_0_ADDR register offset and ring state field lengths. Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Tested-by: Toan Le <toanle@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
3bb502f830
commit
e2f2d9a726
|
@ -86,7 +86,7 @@ enum xgene_enet_rm {
|
|||
#define RINGADDRL_POS 5
|
||||
#define RINGADDRL_LEN 27
|
||||
#define RINGADDRH_POS 0
|
||||
#define RINGADDRH_LEN 6
|
||||
#define RINGADDRH_LEN 7
|
||||
#define RINGSIZE_POS 23
|
||||
#define RINGSIZE_LEN 3
|
||||
#define RINGTYPE_POS 19
|
||||
|
@ -94,9 +94,9 @@ enum xgene_enet_rm {
|
|||
#define RINGMODE_POS 20
|
||||
#define RINGMODE_LEN 3
|
||||
#define RECOMTIMEOUTL_POS 28
|
||||
#define RECOMTIMEOUTL_LEN 3
|
||||
#define RECOMTIMEOUTL_LEN 4
|
||||
#define RECOMTIMEOUTH_POS 0
|
||||
#define RECOMTIMEOUTH_LEN 2
|
||||
#define RECOMTIMEOUTH_LEN 3
|
||||
#define NUMMSGSINQ_POS 1
|
||||
#define NUMMSGSINQ_LEN 16
|
||||
#define ACCEPTLERR BIT(19)
|
||||
|
|
|
@ -33,7 +33,7 @@
|
|||
#define LINK_STATUS BIT(2)
|
||||
#define LINK_UP BIT(15)
|
||||
#define MPA_IDLE_WITH_QMI_EMPTY BIT(12)
|
||||
#define SG_RX_DV_GATE_REG_0_ADDR 0x0dfc
|
||||
#define SG_RX_DV_GATE_REG_0_ADDR 0x05fc
|
||||
|
||||
extern const struct xgene_mac_ops xgene_sgmac_ops;
|
||||
extern const struct xgene_port_ops xgene_sgport_ops;
|
||||
|
|
Loading…
Reference in New Issue