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net: phy: dp83867: Fix SGMII FIFO depth for non OF devices 

Current driver code will read device tree node information,
and set default values if there is no info provided.

This is not done in non-OF devices leading to SGMII fifo depths being
set to the smallest size.

This patch sets the value to the default value of the PHY as stated in the
PHY datasheet.

Fixes: 4dc08dcc9f ("net: phy: dp83867: introduce critical chip default init for non-of platform")
Signed-off-by: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20221110054938.925347-1-michael.wei.hong.sit@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Michael Sit Wei Hong 2022-11-10 13:49:38 +08:00 committed by Jakub Kicinski
parent 8eab9be56c
commit e2a54350dc
1 changed files with 7 additions and 0 deletions
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7
drivers/net/phy/dp83867.c
View File

@ -682,6 +682,13 @@ static int dp83867_of_init(struct phy_device *phydev)
*/
dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN / 2;
/* For non-OF device, the RX and TX FIFO depths are taken from
* default value. So, we init RX & TX FIFO depths here
* so that it is configured correctly later in dp83867_config_init();
*/
dp83867->tx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;
dp83867->rx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;
return 0;
}
#endif /* CONFIG_OF_MDIO */