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ice: Fix setting coalesce to handle DCB configuration 

Currently there can be a case where a DCB map is applied and there are
more interrupt vectors (vsi->num_q_vectors) than Rx queues (vsi->num_rxq)
and Tx queues (vsi->num_txq). If we try to set coalesce settings in this
case it will report a false failure. Fix this by checking if vector index
is valid with respect to the number of Tx and Rx queues configured.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Brett Creeley 2019-11-08 06:23:23 -08:00 committed by Jeff Kirsher
parent 1f9639d2fb
commit e25f9152bc
1 changed files with 10 additions and 3 deletions
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13
drivers/net/ethernet/intel/ice/ice_ethtool.c
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@ -3420,10 +3420,17 @@ __ice_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ec,
struct ice_vsi *vsi = np->vsi;
if (q_num < 0) {
int i;
int v_idx;
ice_for_each_q_vector(vsi, i) {
if (ice_set_q_coalesce(vsi, ec, i))
ice_for_each_q_vector(vsi, v_idx) {
/* In some cases if DCB is configured the num_[rx|tx]q
* can be less than vsi->num_q_vectors. This check
* accounts for that so we don't report a false failure
*/
if (v_idx >= vsi->num_rxq && v_idx >= vsi->num_txq)
goto set_complete;
if (ice_set_q_coalesce(vsi, ec, v_idx))
return -EINVAL;
}
goto set_complete;