drm/i915/pch: Cosmetic fix to FDI link training
Unmask the bits for link training reporting before starting link training. If stage 1 training finished before we unmask them, then we'd spin around in a loop a few times until smashing on through. Which is harmless, since training _did_ succeed, it just looks ugly in dmesg. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -1604,6 +1604,15 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
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int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR;
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u32 temp, tries = 0;
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/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
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for train result */
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temp = I915_READ(fdi_rx_imr_reg);
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temp &= ~FDI_RX_SYMBOL_LOCK;
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temp &= ~FDI_RX_BIT_LOCK;
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I915_WRITE(fdi_rx_imr_reg, temp);
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I915_READ(fdi_rx_imr_reg);
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udelay(150);
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/* enable CPU FDI TX and PCH FDI RX */
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temp = I915_READ(fdi_tx_reg);
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temp |= FDI_TX_ENABLE;
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@ -1621,16 +1630,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
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I915_READ(fdi_rx_reg);
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udelay(150);
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/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
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for train result */
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temp = I915_READ(fdi_rx_imr_reg);
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temp &= ~FDI_RX_SYMBOL_LOCK;
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temp &= ~FDI_RX_BIT_LOCK;
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I915_WRITE(fdi_rx_imr_reg, temp);
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I915_READ(fdi_rx_imr_reg);
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udelay(150);
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for (;;) {
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for (tries = 0; tries < 5; tries++) {
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temp = I915_READ(fdi_rx_iir_reg);
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DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
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@ -1640,14 +1640,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
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temp | FDI_RX_BIT_LOCK);
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break;
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}
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tries++;
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if (tries > 5) {
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}
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if (tries == 5)
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DRM_DEBUG_KMS("FDI train 1 fail!\n");
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break;
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}
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}
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/* Train 2 */
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temp = I915_READ(fdi_tx_reg);
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@ -1663,7 +1658,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
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tries = 0;
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for (;;) {
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for (tries = 0; tries < 5; tries++) {
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temp = I915_READ(fdi_rx_iir_reg);
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DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
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@ -1673,14 +1668,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
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DRM_DEBUG_KMS("FDI train 2 done.\n");
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break;
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}
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tries++;
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if (tries > 5) {
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}
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if (tries == 5)
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DRM_DEBUG_KMS("FDI train 2 fail!\n");
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break;
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}
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}
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DRM_DEBUG_KMS("FDI train done\n");
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}
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@ -1705,6 +1695,15 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
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int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR;
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u32 temp, i;
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/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
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for train result */
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temp = I915_READ(fdi_rx_imr_reg);
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temp &= ~FDI_RX_SYMBOL_LOCK;
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temp &= ~FDI_RX_BIT_LOCK;
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I915_WRITE(fdi_rx_imr_reg, temp);
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I915_READ(fdi_rx_imr_reg);
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udelay(150);
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/* enable CPU FDI TX and PCH FDI RX */
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temp = I915_READ(fdi_tx_reg);
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temp |= FDI_TX_ENABLE;
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@ -1730,15 +1729,6 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
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I915_READ(fdi_rx_reg);
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udelay(150);
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/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
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for train result */
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temp = I915_READ(fdi_rx_imr_reg);
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temp &= ~FDI_RX_SYMBOL_LOCK;
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temp &= ~FDI_RX_BIT_LOCK;
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I915_WRITE(fdi_rx_imr_reg, temp);
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I915_READ(fdi_rx_imr_reg);
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udelay(150);
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for (i = 0; i < 4; i++ ) {
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temp = I915_READ(fdi_tx_reg);
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temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
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