Input: tegra-kbc - support for defining row/columns based on SoC
NVIDIA's Tegra20 and Tegra30 supports the 16x8 keyboard matrix and T114 support the 11x8 Key matrix. Add support for defining the maximum row/columns based on SoC through proper compatibility. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This commit is contained in:
Laxman Dewangan
Dmitry Torokhov
parent
da5bce199f
commit
e10af9e79a
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@ -27,18 +27,19 @@
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/clk.h>
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#include <linux/slab.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/clk/tegra.h>
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#include <linux/err.h>
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#define KBC_MAX_GPIO 24
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#define KBC_MAX_KPENT 8
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#define KBC_MAX_ROW 16
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#define KBC_MAX_COL 8
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#define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
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/* Maximum row/column supported by Tegra KBC yet is 16x8 */
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#define KBC_MAX_GPIO 24
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/* Maximum keys supported by Tegra KBC yet is 16 x 8*/
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#define KBC_MAX_KEY (16 * 8)
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#define KBC_MAX_DEBOUNCE_CNT 0x3ffu
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@ -81,6 +82,12 @@ enum tegra_pin_type {
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PIN_CFG_ROW,
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};
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/* Tegra KBC hw support */
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struct tegra_kbc_hw_support {
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int max_rows;
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int max_columns;
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};
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struct tegra_kbc_pin_cfg {
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enum tegra_pin_type type;
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unsigned char num;
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@ -109,6 +116,9 @@ struct tegra_kbc {
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u32 wakeup_key;
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struct timer_list timer;
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struct clk *clk;
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const struct tegra_kbc_hw_support *hw_support;
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int max_keys;
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int num_rows_and_columns;
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};
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static void tegra_kbc_report_released_keys(struct input_dev *input,
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@ -205,11 +215,11 @@ static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
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/*
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* If the platform uses Fn keymaps, translate keys on a Fn keypress.
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* Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
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* Function keycodes are max_keys apart from the plain keycodes.
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*/
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if (fn_keypress) {
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for (i = 0; i < num_down; i++) {
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scancodes[i] += KBC_MAX_KEY;
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scancodes[i] += kbc->max_keys;
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keycodes[i] = kbc->keycode[scancodes[i]];
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}
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}
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@ -316,7 +326,7 @@ static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
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/* Either mask all keys or none. */
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rst_val = (filter && !kbc->wakeup) ? ~0 : 0;
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for (i = 0; i < KBC_MAX_ROW; i++)
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for (i = 0; i < kbc->hw_support->max_rows; i++)
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writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
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}
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@ -453,7 +463,7 @@ static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc,
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switch (pin_cfg->type) {
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case PIN_CFG_ROW:
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if (pin_cfg->num >= KBC_MAX_ROW) {
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if (pin_cfg->num >= kbc->hw_support->max_rows) {
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dev_err(kbc->dev,
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"pin_cfg[%d]: invalid row number %d\n",
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i, pin_cfg->num);
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@ -463,7 +473,7 @@ static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc,
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break;
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case PIN_CFG_COL:
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if (pin_cfg->num >= KBC_MAX_COL) {
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if (pin_cfg->num >= kbc->hw_support->max_columns) {
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dev_err(kbc->dev,
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"pin_cfg[%d]: invalid column number %d\n",
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i, pin_cfg->num);
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@ -521,6 +531,18 @@ static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
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}
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num_cols = proplen / sizeof(u32);
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if (num_rows > kbc->hw_support->max_rows) {
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dev_err(kbc->dev,
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"Number of rows is more than supported by hardware\n");
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return -EINVAL;
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}
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if (num_cols > kbc->hw_support->max_columns) {
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dev_err(kbc->dev,
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"Number of cols is more than supported by hardware\n");
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return -EINVAL;
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}
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if (!of_get_property(np, "linux,keymap", &proplen)) {
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dev_err(kbc->dev, "property linux,keymap not found\n");
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return -ENOENT;
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@ -533,7 +555,7 @@ static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
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}
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/* Set all pins as non-configured */
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for (i = 0; i < KBC_MAX_GPIO; i++)
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for (i = 0; i < kbc->num_rows_and_columns; i++)
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kbc->pin_cfg[i].type = PIN_CFG_IGNORE;
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ret = of_property_read_u32_array(np, "nvidia,kbc-row-pins",
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@ -563,6 +585,24 @@ static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
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return 0;
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}
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static const struct tegra_kbc_hw_support tegra20_kbc_hw_support = {
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.max_rows = 16,
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.max_columns = 8,
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};
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static const struct tegra_kbc_hw_support tegra11_kbc_hw_support = {
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.max_rows = 11,
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.max_columns = 8,
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};
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static const struct of_device_id tegra_kbc_of_match[] = {
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{ .compatible = "nvidia,tegra114-kbc", .data = &tegra11_kbc_hw_support},
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{ .compatible = "nvidia,tegra30-kbc", .data = &tegra20_kbc_hw_support},
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{ .compatible = "nvidia,tegra20-kbc", .data = &tegra20_kbc_hw_support},
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{ },
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};
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MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
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static int tegra_kbc_probe(struct platform_device *pdev)
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{
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struct tegra_kbc *kbc;
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@ -571,7 +611,10 @@ static int tegra_kbc_probe(struct platform_device *pdev)
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int num_rows = 0;
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unsigned int debounce_cnt;
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unsigned int scan_time_rows;
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unsigned int keymap_rows = KBC_MAX_KEY;
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unsigned int keymap_rows;
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const struct of_device_id *match;
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match = of_match_device(of_match_ptr(tegra_kbc_of_match), &pdev->dev);
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kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL);
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if (!kbc) {
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@ -580,6 +623,12 @@ static int tegra_kbc_probe(struct platform_device *pdev)
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}
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kbc->dev = &pdev->dev;
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kbc->hw_support = match->data;
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kbc->max_keys = kbc->hw_support->max_rows *
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kbc->hw_support->max_columns;
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kbc->num_rows_and_columns = kbc->hw_support->max_rows +
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kbc->hw_support->max_columns;
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keymap_rows = kbc->max_keys;
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spin_lock_init(&kbc->lock);
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err = tegra_kbc_parse_dt(kbc);
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@ -640,7 +689,8 @@ static int tegra_kbc_probe(struct platform_device *pdev)
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keymap_rows *= 2;
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err = matrix_keypad_build_keymap(kbc->keymap_data, NULL,
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keymap_rows, KBC_MAX_COL,
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keymap_rows,
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kbc->hw_support->max_columns,
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kbc->keycode, kbc->idev);
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if (err) {
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dev_err(&pdev->dev, "failed to setup keymap\n");
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@ -766,12 +816,6 @@ static int tegra_kbc_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
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static const struct of_device_id tegra_kbc_of_match[] = {
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{ .compatible = "nvidia,tegra20-kbc", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
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static struct platform_driver tegra_kbc_driver = {
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.probe = tegra_kbc_probe,
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.driver = {
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