drm: bridge: it66121: Add audio support
Adding the audio support on the HDMI bridge for I2S only. Signed-off-by: Nicolas Belin <nbelin@baylibre.com> Signed-off-by: Andy.Hsieh <Andy.Hsieh@mediatek.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220316135733.173950-4-nbelin@baylibre.com
This commit is contained in:
Nicolas Belin
Neil Armstrong
parent
003a1bd6a2
commit
e0fd83dbe9
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@ -27,6 +27,8 @@
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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#include <sound/hdmi-codec.h>
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#define IT66121_VENDOR_ID0_REG 0x00
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#define IT66121_VENDOR_ID1_REG 0x01
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#define IT66121_DEVICE_ID0_REG 0x02
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@ -155,6 +157,9 @@
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#define IT66121_AV_MUTE_ON BIT(0)
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#define IT66121_AV_MUTE_BLUESCR BIT(1)
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#define IT66121_PKT_CTS_CTRL_REG 0xC5
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#define IT66121_PKT_CTS_CTRL_SEL BIT(1)
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#define IT66121_PKT_GEN_CTRL_REG 0xC6
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#define IT66121_PKT_GEN_CTRL_ON BIT(0)
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#define IT66121_PKT_GEN_CTRL_RPT BIT(1)
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@ -202,6 +207,89 @@
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#define IT66121_EDID_SLEEP_US 20000
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#define IT66121_EDID_TIMEOUT_US 200000
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#define IT66121_EDID_FIFO_SIZE 32
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#define IT66121_CLK_CTRL0_REG 0x58
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#define IT66121_CLK_CTRL0_AUTO_OVER_SAMPLING BIT(4)
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#define IT66121_CLK_CTRL0_EXT_MCLK_MASK GENMASK(3, 2)
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#define IT66121_CLK_CTRL0_EXT_MCLK_128FS (0 << 2)
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#define IT66121_CLK_CTRL0_EXT_MCLK_256FS BIT(2)
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#define IT66121_CLK_CTRL0_EXT_MCLK_512FS (2 << 2)
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#define IT66121_CLK_CTRL0_EXT_MCLK_1024FS (3 << 2)
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#define IT66121_CLK_CTRL0_AUTO_IPCLK BIT(0)
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#define IT66121_CLK_STATUS1_REG 0x5E
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#define IT66121_CLK_STATUS2_REG 0x5F
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#define IT66121_AUD_CTRL0_REG 0xE0
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#define IT66121_AUD_SWL (3 << 6)
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#define IT66121_AUD_16BIT (0 << 6)
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#define IT66121_AUD_18BIT BIT(6)
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#define IT66121_AUD_20BIT (2 << 6)
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#define IT66121_AUD_24BIT (3 << 6)
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#define IT66121_AUD_SPDIFTC BIT(5)
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#define IT66121_AUD_SPDIF BIT(4)
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#define IT66121_AUD_I2S (0 << 4)
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#define IT66121_AUD_EN_I2S3 BIT(3)
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#define IT66121_AUD_EN_I2S2 BIT(2)
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#define IT66121_AUD_EN_I2S1 BIT(1)
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#define IT66121_AUD_EN_I2S0 BIT(0)
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#define IT66121_AUD_CTRL0_AUD_SEL BIT(4)
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#define IT66121_AUD_CTRL1_REG 0xE1
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#define IT66121_AUD_FIFOMAP_REG 0xE2
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#define IT66121_AUD_CTRL3_REG 0xE3
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#define IT66121_AUD_SRCVALID_FLAT_REG 0xE4
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#define IT66121_AUD_FLAT_SRC0 BIT(4)
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#define IT66121_AUD_FLAT_SRC1 BIT(5)
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#define IT66121_AUD_FLAT_SRC2 BIT(6)
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#define IT66121_AUD_FLAT_SRC3 BIT(7)
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#define IT66121_AUD_HDAUDIO_REG 0xE5
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#define IT66121_AUD_PKT_CTS0_REG 0x130
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#define IT66121_AUD_PKT_CTS1_REG 0x131
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#define IT66121_AUD_PKT_CTS2_REG 0x132
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#define IT66121_AUD_PKT_N0_REG 0x133
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#define IT66121_AUD_PKT_N1_REG 0x134
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#define IT66121_AUD_PKT_N2_REG 0x135
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#define IT66121_AUD_CHST_MODE_REG 0x191
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#define IT66121_AUD_CHST_CAT_REG 0x192
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#define IT66121_AUD_CHST_SRCNUM_REG 0x193
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#define IT66121_AUD_CHST_CHTNUM_REG 0x194
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#define IT66121_AUD_CHST_CA_FS_REG 0x198
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#define IT66121_AUD_CHST_OFS_WL_REG 0x199
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#define IT66121_AUD_PKT_CTS_CNT0_REG 0x1A0
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#define IT66121_AUD_PKT_CTS_CNT1_REG 0x1A1
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#define IT66121_AUD_PKT_CTS_CNT2_REG 0x1A2
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#define IT66121_AUD_FS_22P05K 0x4
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#define IT66121_AUD_FS_44P1K 0x0
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#define IT66121_AUD_FS_88P2K 0x8
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#define IT66121_AUD_FS_176P4K 0xC
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#define IT66121_AUD_FS_24K 0x6
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#define IT66121_AUD_FS_48K 0x2
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#define IT66121_AUD_FS_96K 0xA
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#define IT66121_AUD_FS_192K 0xE
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#define IT66121_AUD_FS_768K 0x9
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#define IT66121_AUD_FS_32K 0x3
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#define IT66121_AUD_FS_OTHER 0x1
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#define IT66121_AUD_SWL_21BIT 0xD
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#define IT66121_AUD_SWL_24BIT 0xB
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#define IT66121_AUD_SWL_23BIT 0x9
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#define IT66121_AUD_SWL_22BIT 0x5
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#define IT66121_AUD_SWL_20BIT 0x3
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#define IT66121_AUD_SWL_17BIT 0xC
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#define IT66121_AUD_SWL_19BIT 0x8
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#define IT66121_AUD_SWL_18BIT 0x4
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#define IT66121_AUD_SWL_16BIT 0x2
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#define IT66121_AUD_SWL_NOT_INDICATED 0x0
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#define IT66121_VENDOR_ID0 0x54
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#define IT66121_VENDOR_ID1 0x49
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#define IT66121_DEVICE_ID0 0x12
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#define IT66121_DEVICE_ID1 0x06
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#define IT66121_DEVICE_MASK 0x0F
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#define IT66121_AFE_CLK_HIGH 80000 /* Khz */
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struct it66121_ctx {
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@ -216,6 +304,13 @@ struct it66121_ctx {
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u32 bus_width;
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struct mutex lock; /* Protects fields below and device registers */
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struct hdmi_avi_infoframe hdmi_avi_infoframe;
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struct {
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struct platform_device *pdev;
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u8 ch_enable;
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u8 fs;
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u8 swl;
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bool auto_cts;
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} audio;
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};
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static const struct regmap_range_cfg it66121_regmap_banks[] = {
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@ -886,6 +981,536 @@ unlock:
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return IRQ_HANDLED;
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}
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static int it661221_set_chstat(struct it66121_ctx *ctx, u8 iec60958_chstat[])
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{
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int ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CHST_MODE_REG, iec60958_chstat[0] & 0x7C);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CHST_CAT_REG, iec60958_chstat[1]);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CHST_SRCNUM_REG, iec60958_chstat[2] & 0x0F);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CHST_CHTNUM_REG,
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(iec60958_chstat[2] >> 4) & 0x0F);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CHST_CA_FS_REG, iec60958_chstat[3]);
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if (ret)
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return ret;
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return regmap_write(ctx->regmap, IT66121_AUD_CHST_OFS_WL_REG, iec60958_chstat[4]);
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}
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static int it661221_set_lpcm_audio(struct it66121_ctx *ctx, u8 audio_src_num, u8 audio_swl)
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{
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int ret;
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unsigned int audio_enable = 0;
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unsigned int audio_format = 0;
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switch (audio_swl) {
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case 16:
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audio_enable |= IT66121_AUD_16BIT;
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break;
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case 18:
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audio_enable |= IT66121_AUD_18BIT;
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break;
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case 20:
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audio_enable |= IT66121_AUD_20BIT;
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break;
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case 24:
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default:
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audio_enable |= IT66121_AUD_24BIT;
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break;
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}
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audio_format |= 0x40;
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switch (audio_src_num) {
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case 4:
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audio_enable |= IT66121_AUD_EN_I2S3 | IT66121_AUD_EN_I2S2 |
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IT66121_AUD_EN_I2S1 | IT66121_AUD_EN_I2S0;
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break;
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case 3:
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audio_enable |= IT66121_AUD_EN_I2S2 | IT66121_AUD_EN_I2S1 |
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IT66121_AUD_EN_I2S0;
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break;
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case 2:
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audio_enable |= IT66121_AUD_EN_I2S1 | IT66121_AUD_EN_I2S0;
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break;
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case 1:
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default:
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audio_format &= ~0x40;
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audio_enable |= IT66121_AUD_EN_I2S0;
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break;
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}
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audio_format |= 0x01;
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ctx->audio.ch_enable = audio_enable;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CTRL0_REG, audio_enable & 0xF0);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CTRL1_REG, audio_format);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_FIFOMAP_REG, 0xE4);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CTRL3_REG, 0x00);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_SRCVALID_FLAT_REG, 0x00);
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if (ret)
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return ret;
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return regmap_write(ctx->regmap, IT66121_AUD_HDAUDIO_REG, 0x00);
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}
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static int it661221_set_ncts(struct it66121_ctx *ctx, u8 fs)
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{
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int ret;
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unsigned int n;
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switch (fs) {
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case IT66121_AUD_FS_32K:
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n = 4096;
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break;
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case IT66121_AUD_FS_44P1K:
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n = 6272;
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break;
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case IT66121_AUD_FS_48K:
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n = 6144;
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break;
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case IT66121_AUD_FS_88P2K:
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n = 12544;
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break;
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case IT66121_AUD_FS_96K:
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n = 12288;
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break;
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case IT66121_AUD_FS_176P4K:
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n = 25088;
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break;
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case IT66121_AUD_FS_192K:
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n = 24576;
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break;
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case IT66121_AUD_FS_768K:
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n = 24576;
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break;
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default:
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n = 6144;
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break;
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}
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ret = regmap_write(ctx->regmap, IT66121_AUD_PKT_N0_REG, (u8)((n) & 0xFF));
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_PKT_N1_REG, (u8)((n >> 8) & 0xFF));
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_PKT_N2_REG, (u8)((n >> 16) & 0xF));
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if (ret)
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return ret;
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if (ctx->audio.auto_cts) {
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u8 loop_cnt = 255;
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u8 cts_stable_cnt = 0;
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unsigned int sum_cts = 0;
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unsigned int cts = 0;
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unsigned int last_cts = 0;
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unsigned int diff;
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unsigned int val;
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while (loop_cnt--) {
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msleep(30);
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regmap_read(ctx->regmap, IT66121_AUD_PKT_CTS_CNT2_REG, &val);
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cts = val << 12;
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regmap_read(ctx->regmap, IT66121_AUD_PKT_CTS_CNT1_REG, &val);
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cts |= val << 4;
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regmap_read(ctx->regmap, IT66121_AUD_PKT_CTS_CNT0_REG, &val);
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cts |= val >> 4;
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if (cts == 0) {
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continue;
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} else {
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if (last_cts > cts)
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diff = last_cts - cts;
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else
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diff = cts - last_cts;
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last_cts = cts;
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if (diff < 5) {
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cts_stable_cnt++;
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sum_cts += cts;
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} else {
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cts_stable_cnt = 0;
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sum_cts = 0;
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continue;
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}
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if (cts_stable_cnt >= 32) {
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last_cts = (sum_cts >> 5);
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break;
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}
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}
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}
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regmap_write(ctx->regmap, IT66121_AUD_PKT_CTS0_REG, (u8)((last_cts) & 0xFF));
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regmap_write(ctx->regmap, IT66121_AUD_PKT_CTS1_REG, (u8)((last_cts >> 8) & 0xFF));
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regmap_write(ctx->regmap, IT66121_AUD_PKT_CTS2_REG, (u8)((last_cts >> 16) & 0x0F));
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}
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ret = regmap_write(ctx->regmap, 0xF8, 0xC3);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, 0xF8, 0xA5);
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if (ret)
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return ret;
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if (ctx->audio.auto_cts) {
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ret = regmap_write_bits(ctx->regmap, IT66121_PKT_CTS_CTRL_REG,
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IT66121_PKT_CTS_CTRL_SEL,
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1);
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} else {
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ret = regmap_write_bits(ctx->regmap, IT66121_PKT_CTS_CTRL_REG,
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IT66121_PKT_CTS_CTRL_SEL,
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0);
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}
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if (ret)
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return ret;
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return regmap_write(ctx->regmap, 0xF8, 0xFF);
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}
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static int it661221_audio_output_enable(struct it66121_ctx *ctx, bool enable)
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{
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int ret;
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if (enable) {
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ret = regmap_write_bits(ctx->regmap, IT66121_SW_RST_REG,
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IT66121_SW_RST_AUD | IT66121_SW_RST_AREF,
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0);
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if (ret)
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return ret;
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ret = regmap_write_bits(ctx->regmap, IT66121_AUD_CTRL0_REG,
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IT66121_AUD_EN_I2S3 | IT66121_AUD_EN_I2S2 |
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IT66121_AUD_EN_I2S1 | IT66121_AUD_EN_I2S0,
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ctx->audio.ch_enable);
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} else {
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ret = regmap_write_bits(ctx->regmap, IT66121_AUD_CTRL0_REG,
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IT66121_AUD_EN_I2S3 | IT66121_AUD_EN_I2S2 |
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IT66121_AUD_EN_I2S1 | IT66121_AUD_EN_I2S0,
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ctx->audio.ch_enable & 0xF0);
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if (ret)
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return ret;
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ret = regmap_write_bits(ctx->regmap, IT66121_SW_RST_REG,
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IT66121_SW_RST_AUD | IT66121_SW_RST_AREF,
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IT66121_SW_RST_AUD | IT66121_SW_RST_AREF);
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}
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return ret;
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}
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static int it661221_audio_ch_enable(struct it66121_ctx *ctx, bool enable)
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{
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int ret;
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if (enable) {
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ret = regmap_write(ctx->regmap, IT66121_AUD_SRCVALID_FLAT_REG, 0);
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if (ret)
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return ret;
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ret = regmap_write(ctx->regmap, IT66121_AUD_CTRL0_REG, ctx->audio.ch_enable);
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} else {
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ret = regmap_write(ctx->regmap, IT66121_AUD_CTRL0_REG, ctx->audio.ch_enable & 0xF0);
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}
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return ret;
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}
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static int it66121_audio_hw_params(struct device *dev, void *data,
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struct hdmi_codec_daifmt *daifmt,
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struct hdmi_codec_params *params)
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{
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u8 fs;
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u8 swl;
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int ret;
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struct it66121_ctx *ctx = dev_get_drvdata(dev);
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static u8 iec60958_chstat[5];
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unsigned int channels = params->channels;
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unsigned int sample_rate = params->sample_rate;
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unsigned int sample_width = params->sample_width;
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mutex_lock(&ctx->lock);
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dev_dbg(dev, "%s: %u, %u, %u, %u\n", __func__,
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daifmt->fmt, sample_rate, sample_width, channels);
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switch (daifmt->fmt) {
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case HDMI_I2S:
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dev_dbg(dev, "Using HDMI I2S\n");
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break;
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default:
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dev_err(dev, "Invalid or unsupported DAI format %d\n", daifmt->fmt);
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ret = -EINVAL;
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goto out;
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}
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// Set audio clock recovery (N/CTS)
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ret = regmap_write(ctx->regmap, IT66121_CLK_CTRL0_REG,
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IT66121_CLK_CTRL0_AUTO_OVER_SAMPLING |
|
||||
IT66121_CLK_CTRL0_EXT_MCLK_256FS |
|
||||
IT66121_CLK_CTRL0_AUTO_IPCLK);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = regmap_write_bits(ctx->regmap, IT66121_AUD_CTRL0_REG,
|
||||
IT66121_AUD_CTRL0_AUD_SEL, 0); // remove spdif selection
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
switch (sample_rate) {
|
||||
case 44100L:
|
||||
fs = IT66121_AUD_FS_44P1K;
|
||||
break;
|
||||
case 88200L:
|
||||
fs = IT66121_AUD_FS_88P2K;
|
||||
break;
|
||||
case 176400L:
|
||||
fs = IT66121_AUD_FS_176P4K;
|
||||
break;
|
||||
case 32000L:
|
||||
fs = IT66121_AUD_FS_32K;
|
||||
break;
|
||||
case 48000L:
|
||||
fs = IT66121_AUD_FS_48K;
|
||||
break;
|
||||
case 96000L:
|
||||
fs = IT66121_AUD_FS_96K;
|
||||
break;
|
||||
case 192000L:
|
||||
fs = IT66121_AUD_FS_192K;
|
||||
break;
|
||||
case 768000L:
|
||||
fs = IT66121_AUD_FS_768K;
|
||||
break;
|
||||
default:
|
||||
fs = IT66121_AUD_FS_48K;
|
||||
break;
|
||||
}
|
||||
|
||||
ctx->audio.fs = fs;
|
||||
ret = it661221_set_ncts(ctx, fs);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to set N/CTS: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
// Set audio format register (except audio channel enable)
|
||||
ret = it661221_set_lpcm_audio(ctx, (channels + 1) / 2, sample_width);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to set LPCM audio: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
// Set audio channel status
|
||||
iec60958_chstat[0] = 0;
|
||||
if ((channels + 1) / 2 == 1)
|
||||
iec60958_chstat[0] |= 0x1;
|
||||
iec60958_chstat[0] &= ~(1 << 1);
|
||||
iec60958_chstat[1] = 0;
|
||||
iec60958_chstat[2] = (channels + 1) / 2;
|
||||
iec60958_chstat[2] |= (channels << 4) & 0xF0;
|
||||
iec60958_chstat[3] = fs;
|
||||
|
||||
switch (sample_width) {
|
||||
case 21L:
|
||||
swl = IT66121_AUD_SWL_21BIT;
|
||||
break;
|
||||
case 24L:
|
||||
swl = IT66121_AUD_SWL_24BIT;
|
||||
break;
|
||||
case 23L:
|
||||
swl = IT66121_AUD_SWL_23BIT;
|
||||
break;
|
||||
case 22L:
|
||||
swl = IT66121_AUD_SWL_22BIT;
|
||||
break;
|
||||
case 20L:
|
||||
swl = IT66121_AUD_SWL_20BIT;
|
||||
break;
|
||||
case 17L:
|
||||
swl = IT66121_AUD_SWL_17BIT;
|
||||
break;
|
||||
case 19L:
|
||||
swl = IT66121_AUD_SWL_19BIT;
|
||||
break;
|
||||
case 18L:
|
||||
swl = IT66121_AUD_SWL_18BIT;
|
||||
break;
|
||||
case 16L:
|
||||
swl = IT66121_AUD_SWL_16BIT;
|
||||
break;
|
||||
default:
|
||||
swl = IT66121_AUD_SWL_NOT_INDICATED;
|
||||
break;
|
||||
}
|
||||
|
||||
iec60958_chstat[4] = (((~fs) << 4) & 0xF0) | swl;
|
||||
ret = it661221_set_chstat(ctx, iec60958_chstat);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to set channel status: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
// Enable audio channel enable while input clock stable (if SPDIF).
|
||||
ret = it661221_audio_ch_enable(ctx, true);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to enable audio channel: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = regmap_write_bits(ctx->regmap, IT66121_INT_MASK1_REG,
|
||||
IT66121_INT_MASK1_AUD_OVF,
|
||||
0);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
dev_dbg(dev, "HDMI audio enabled.\n");
|
||||
out:
|
||||
mutex_unlock(&ctx->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int it66121_audio_startup(struct device *dev, void *data)
|
||||
{
|
||||
int ret;
|
||||
struct it66121_ctx *ctx = dev_get_drvdata(dev);
|
||||
|
||||
dev_dbg(dev, "%s\n", __func__);
|
||||
|
||||
mutex_lock(&ctx->lock);
|
||||
ret = it661221_audio_output_enable(ctx, true);
|
||||
if (ret)
|
||||
dev_err(dev, "Failed to enable audio output: %d\n", ret);
|
||||
|
||||
mutex_unlock(&ctx->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void it66121_audio_shutdown(struct device *dev, void *data)
|
||||
{
|
||||
int ret;
|
||||
struct it66121_ctx *ctx = dev_get_drvdata(dev);
|
||||
|
||||
dev_dbg(dev, "%s\n", __func__);
|
||||
|
||||
mutex_lock(&ctx->lock);
|
||||
ret = it661221_audio_output_enable(ctx, false);
|
||||
if (ret)
|
||||
dev_err(dev, "Failed to disable audio output: %d\n", ret);
|
||||
|
||||
mutex_unlock(&ctx->lock);
|
||||
}
|
||||
|
||||
static int it66121_audio_mute(struct device *dev, void *data,
|
||||
bool enable, int direction)
|
||||
{
|
||||
int ret;
|
||||
struct it66121_ctx *ctx = dev_get_drvdata(dev);
|
||||
|
||||
dev_dbg(dev, "%s: enable=%s, direction=%d\n",
|
||||
__func__, enable ? "true" : "false", direction);
|
||||
|
||||
mutex_lock(&ctx->lock);
|
||||
|
||||
if (enable) {
|
||||
ret = regmap_write_bits(ctx->regmap, IT66121_AUD_SRCVALID_FLAT_REG,
|
||||
IT66121_AUD_FLAT_SRC0 | IT66121_AUD_FLAT_SRC1 |
|
||||
IT66121_AUD_FLAT_SRC2 | IT66121_AUD_FLAT_SRC3,
|
||||
IT66121_AUD_FLAT_SRC0 | IT66121_AUD_FLAT_SRC1 |
|
||||
IT66121_AUD_FLAT_SRC2 | IT66121_AUD_FLAT_SRC3);
|
||||
} else {
|
||||
ret = regmap_write_bits(ctx->regmap, IT66121_AUD_SRCVALID_FLAT_REG,
|
||||
IT66121_AUD_FLAT_SRC0 | IT66121_AUD_FLAT_SRC1 |
|
||||
IT66121_AUD_FLAT_SRC2 | IT66121_AUD_FLAT_SRC3,
|
||||
0);
|
||||
}
|
||||
|
||||
mutex_unlock(&ctx->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int it66121_audio_get_eld(struct device *dev, void *data,
|
||||
u8 *buf, size_t len)
|
||||
{
|
||||
struct it66121_ctx *ctx = dev_get_drvdata(dev);
|
||||
|
||||
mutex_lock(&ctx->lock);
|
||||
|
||||
memcpy(buf, ctx->connector->eld,
|
||||
min(sizeof(ctx->connector->eld), len));
|
||||
|
||||
mutex_unlock(&ctx->lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct hdmi_codec_ops it66121_audio_codec_ops = {
|
||||
.hw_params = it66121_audio_hw_params,
|
||||
.audio_startup = it66121_audio_startup,
|
||||
.audio_shutdown = it66121_audio_shutdown,
|
||||
.mute_stream = it66121_audio_mute,
|
||||
.get_eld = it66121_audio_get_eld,
|
||||
.no_capture_mute = 1,
|
||||
};
|
||||
|
||||
static int it66121_audio_codec_init(struct it66121_ctx *ctx, struct device *dev)
|
||||
{
|
||||
struct hdmi_codec_pdata codec_data = {
|
||||
.ops = &it66121_audio_codec_ops,
|
||||
.i2s = 1, /* Only i2s support for now */
|
||||
.spdif = 0,
|
||||
.max_i2s_channels = 8,
|
||||
};
|
||||
|
||||
dev_dbg(dev, "%s\n", __func__);
|
||||
|
||||
if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) {
|
||||
dev_info(dev, "No \"#sound-dai-cells\", no audio\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
ctx->audio.pdev = platform_device_register_data(dev,
|
||||
HDMI_CODEC_DRV_NAME,
|
||||
PLATFORM_DEVID_AUTO,
|
||||
&codec_data,
|
||||
sizeof(codec_data));
|
||||
|
||||
if (IS_ERR(ctx->audio.pdev)) {
|
||||
dev_err(dev, "Failed to initialize HDMI audio codec: %d\n",
|
||||
PTR_ERR_OR_ZERO(ctx->audio.pdev));
|
||||
}
|
||||
|
||||
return PTR_ERR_OR_ZERO(ctx->audio.pdev);
|
||||
}
|
||||
|
||||
static int it66121_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
|
|
@ -988,6 +1613,8 @@ static int it66121_probe(struct i2c_client *client,
|
|||
return ret;
|
||||
}
|
||||
|
||||
it66121_audio_codec_init(ctx, dev);
|
||||
|
||||
drm_bridge_add(&ctx->bridge);
|
||||
|
||||
dev_info(ctx->dev, "IT66121 revision %d probed\n", revision_id);
|
||||
|
|
|
|||
Loading…
Reference in New Issue