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drm/amd/powerplay: unshare the code for retrieving current clock frequency 

By moving them into asic specific file. Since they are really ASIC
specific.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2020-06-09 13:15:29 +08:00 committed by Alex Deucher
parent 5e6dc8feae
commit e0f9e93640
6 changed files with 41 additions and 16 deletions
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11
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
View File

@ -1201,6 +1201,17 @@ static int arcturus_read_sensor(struct smu_context *smu,
(uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_MCLK:
ret = arcturus_get_current_clk_freq_by_table(smu, SMU_UCLK, (uint32_t *)data);
/* the output clock frequency in 10K unit */
*(uint32_t *)data *= 100;
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
ret = arcturus_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
default:
ret = smu_v11_0_read_sensor(smu, sensor, data, size);
}

10
drivers/gpu/drm/amd/powerplay/navi10_ppt.c
View File

@ -1697,6 +1697,16 @@ static int navi10_read_sensor(struct smu_context *smu,
ret = navi10_thermal_get_temperature(smu, sensor, (uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_MCLK:
ret = navi10_get_current_clk_freq_by_table(smu, SMU_UCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
default:
ret = smu_v11_0_read_sensor(smu, sensor, data, size);
}

10
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
View File

@ -896,6 +896,16 @@ static int renoir_read_sensor(struct smu_context *smu,
ret = renoir_get_gpu_temperature(smu, (uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_MCLK:
ret = renoir_get_current_clk_freq_by_table(smu, SMU_UCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
ret = renoir_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
default:
ret = smu_v12_0_read_sensor(smu, sensor, data, size);
}

10
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
View File

@ -1500,6 +1500,16 @@ static int sienna_cichlid_read_sensor(struct smu_context *smu,
ret = sienna_cichlid_thermal_get_temperature(smu, sensor, (uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_MCLK:
ret = sienna_cichlid_get_current_clk_freq_by_table(smu, SMU_UCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
ret = sienna_cichlid_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
default:
ret = smu_v11_0_read_sensor(smu, sensor, data, size);
}

8
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View File

@ -1182,14 +1182,6 @@ int smu_v11_0_read_sensor(struct smu_context *smu,
return -EINVAL;
switch (sensor) {
case AMDGPU_PP_SENSOR_GFX_MCLK:
ret = smu_v11_0_get_current_clk_freq(smu, SMU_UCLK, (uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
ret = smu_v11_0_get_current_clk_freq(smu, SMU_GFXCLK, (uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_VDDGFX:
ret = smu_v11_0_get_gfx_vdd(smu, (uint32_t *)data);
*size = 4;

8
drivers/gpu/drm/amd/powerplay/smu_v12_0.c
View File

@ -213,14 +213,6 @@ int smu_v12_0_read_sensor(struct smu_context *smu,
return -EINVAL;
switch (sensor) {
case AMDGPU_PP_SENSOR_GFX_MCLK:
ret = smu_v12_0_get_current_clk_freq(smu, SMU_UCLK, (uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
ret = smu_v12_0_get_current_clk_freq(smu, SMU_GFXCLK, (uint32_t *)data);
*size = 4;
break;
default:
ret = -EOPNOTSUPP;
break;