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clk: sunxi: Implement A31 USB clock 

The A31 USB clock slightly differ from its older counterparts, mostly
because it has a different gate for each PHY, while the older one had
a single gate for all the phy.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
This commit is contained in:
Maxime Ripard 2014-05-13 17:44:15 +02:00
parent 3f6eec9969
commit e0e7943c55
1 changed files with 6 additions and 0 deletions
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6
drivers/clk/sunxi/clk-sunxi.c
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@ -1009,6 +1009,11 @@ static const struct gates_data sun5i_a13_usb_gates_data __initconst = {
.reset_mask = 0x03,
};
static const struct gates_data sun6i_a31_usb_gates_data __initconst = {
.mask = { BIT(18) | BIT(17) | BIT(16) | BIT(10) | BIT(9) | BIT(8) },
.reset_mask = BIT(2) | BIT(1) | BIT(0),
};
static void __init sunxi_gates_clk_setup(struct device_node *node,
struct gates_data *data)
{
@ -1304,6 +1309,7 @@ static const struct of_device_id clk_gates_match[] __initconst = {
{.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,},
{.compatible = "allwinner,sun4i-a10-usb-clk", .data = &sun4i_a10_usb_gates_data,},
{.compatible = "allwinner,sun5i-a13-usb-clk", .data = &sun5i_a13_usb_gates_data,},
{.compatible = "allwinner,sun6i-a31-usb-clk", .data = &sun6i_a31_usb_gates_data,},
{}
};