wireless-drivers-next patches for 4.16
The most important here is the ssb fix, it has been reported by the users frequently and the fix just missed the final v4.15. Also numerous other fixes, mt76 had multiple problems with aggregation and a long standing unaligned access bug in rtlwifi is finally fixed. Major changes: ath10k * correct firmware RAM dump length for QCA6174/QCA9377 * add new QCA988X device id * fix a kernel panic during pci probe * revert a recent commit which broke ath10k firmware metadata parsing ath9k * fix a noise floor regression introduced during the merge window * add new device id rtlwifi * fix unaligned access seen on ARM architecture mt76 * various aggregation fixes which fix connection stalls ssb * fix b43 and b44 on non-MIPS which broke in v4.15-rc9 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJafIqwAAoJEG4XJFUm622bY1AH/jlWytWm+1/u8BTPFje0soxI 8ISNaTDVKu2s2DjCO7liuDGoQ/YqmYBYm0rc53RB0xI6hTSzdlD59gio9vUR6mF7 VQWhJ+L8H1mD0mJOwKP+VY/z0nkNK9QwOPZIO/sdspTp9LP207zSILabZEn58PEp KKINTJagkBHb1zIm5Zl9jyin4PsOKRzWfp8z532Mw61S3+m8CbsKrRXnCB++gNAn 71a5ScPScsW/ROnJV9clx6CEsme5irFDz9qcknfz8se9do9uj+0kgkxFWGB+gnRl 2Mz3EIVhkEaZ4IMVXlv6yhan4bfkpsbPavw/hO2iHbLfZNpXrWEM+zIoSzOmOoc= =BJaf -----END PGP SIGNATURE----- Merge tag 'wireless-drivers-next-for-davem-2018-02-08' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for 4.16 The most important here is the ssb fix, it has been reported by the users frequently and the fix just missed the final v4.15. Also numerous other fixes, mt76 had multiple problems with aggregation and a long standing unaligned access bug in rtlwifi is finally fixed. Major changes: ath10k * correct firmware RAM dump length for QCA6174/QCA9377 * add new QCA988X device id * fix a kernel panic during pci probe * revert a recent commit which broke ath10k firmware metadata parsing ath9k * fix a noise floor regression introduced during the merge window * add new device id rtlwifi * fix unaligned access seen on ARM architecture mt76 * various aggregation fixes which fix connection stalls ssb * fix b43 and b44 on non-MIPS which broke in v4.15-rc9 ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
e0c42c8e3e
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@ -90,6 +90,35 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.target_64bit = false,
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.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA988X_HW_2_0_VERSION,
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.dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
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.name = "qca988x hw2.0 ubiquiti",
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.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
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.uart_pin = 7,
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.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.cal_data_len = 2116,
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.fw = {
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.dir = QCA988X_HW_2_0_FW_DIR,
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.board = QCA988X_HW_2_0_BOARD_DATA_FILE,
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.board_size = QCA988X_BOARD_DATA_SZ,
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.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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.spectral_bin_discard = 0,
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.vht160_mcs_rx_highest = 0,
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.vht160_mcs_tx_highest = 0,
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.n_cipher_suites = 8,
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.num_peers = TARGET_TLV_NUM_PEERS,
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA9887_HW_1_0_VERSION,
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.dev_id = QCA9887_1_0_DEVICE_ID,
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@ -1276,10 +1305,7 @@ static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
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len -= sizeof(*hdr);
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data = hdr->data;
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/* jump over the padding */
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ie_len = ALIGN(ie_len, 4);
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if (len < ie_len) {
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if (len < ALIGN(ie_len, 4)) {
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ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
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ie_id, ie_len, len);
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ret = -EINVAL;
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@ -1318,6 +1344,9 @@ static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
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goto out;
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}
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/* jump over the padding */
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ie_len = ALIGN(ie_len, 4);
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len -= ie_len;
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data += ie_len;
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}
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@ -1448,9 +1477,6 @@ int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
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len -= sizeof(*hdr);
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data += sizeof(*hdr);
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/* jump over the padding */
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ie_len = ALIGN(ie_len, 4);
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if (len < ie_len) {
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ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
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ie_id, len, ie_len);
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@ -1556,6 +1582,9 @@ int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
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break;
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}
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/* jump over the padding */
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ie_len = ALIGN(ie_len, 4);
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len -= ie_len;
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data += ie_len;
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}
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@ -616,7 +617,7 @@ static const struct ath10k_mem_region qca6174_hw30_mem_regions[] = {
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{
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.type = ATH10K_MEM_REGION_TYPE_DRAM,
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.start = 0x400000,
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.len = 0x90000,
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.len = 0xa8000,
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.name = "DRAM",
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.section_table = {
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.sections = NULL,
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@ -1,6 +1,7 @@
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/*
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* Copyright (c) 2005-2011 Atheros Communications Inc.
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* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@ -81,6 +82,8 @@ void ath10k_debug_print_hwfw_info(struct ath10k *ar)
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void ath10k_debug_print_board_info(struct ath10k *ar)
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{
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char boardinfo[100];
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const struct firmware *board;
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u32 crc;
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if (ar->id.bmi_ids_valid)
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scnprintf(boardinfo, sizeof(boardinfo), "%d:%d",
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@ -88,11 +91,16 @@ void ath10k_debug_print_board_info(struct ath10k *ar)
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else
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scnprintf(boardinfo, sizeof(boardinfo), "N/A");
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board = ar->normal_mode_fw.board;
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if (!IS_ERR_OR_NULL(board))
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crc = crc32_le(0, board->data, board->size);
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else
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crc = 0;
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ath10k_info(ar, "board_file api %d bmi_id %s crc32 %08x",
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ar->bd_api,
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boardinfo,
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crc32_le(0, ar->normal_mode_fw.board->data,
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ar->normal_mode_fw.board->size));
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crc);
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}
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void ath10k_debug_print_boot_info(struct ath10k *ar)
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@ -22,6 +22,7 @@
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#define ATH10K_FW_DIR "ath10k"
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#define QCA988X_2_0_DEVICE_ID_UBNT (0x11ac)
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#define QCA988X_2_0_DEVICE_ID (0x003c)
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#define QCA6164_2_1_DEVICE_ID (0x0041)
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#define QCA6174_2_1_DEVICE_ID (0x003e)
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@ -58,6 +58,9 @@ MODULE_PARM_DESC(reset_mode, "0: auto, 1: warm only (default: 0)");
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#define ATH10K_DIAG_TRANSFER_LIMIT 0x5000
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static const struct pci_device_id ath10k_pci_id_table[] = {
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/* PCI-E QCA988X V2 (Ubiquiti branded) */
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{ PCI_VDEVICE(UBIQUITI, QCA988X_2_0_DEVICE_ID_UBNT) },
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{ PCI_VDEVICE(ATHEROS, QCA988X_2_0_DEVICE_ID) }, /* PCI-E QCA988X V2 */
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{ PCI_VDEVICE(ATHEROS, QCA6164_2_1_DEVICE_ID) }, /* PCI-E QCA6164 V2.1 */
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{ PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
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@ -74,6 +77,7 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
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* hacks. ath10k doesn't have them and these devices crash horribly
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* because of that.
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*/
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{ QCA988X_2_0_DEVICE_ID_UBNT, QCA988X_HW_2_0_CHIP_ID_REV },
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{ QCA988X_2_0_DEVICE_ID, QCA988X_HW_2_0_CHIP_ID_REV },
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{ QCA6164_2_1_DEVICE_ID, QCA6174_HW_2_1_CHIP_ID_REV },
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@ -2193,6 +2197,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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switch (ar_pci->pdev->device) {
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case QCA988X_2_0_DEVICE_ID_UBNT:
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case QCA988X_2_0_DEVICE_ID:
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case QCA99X0_2_0_DEVICE_ID:
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case QCA9888_2_0_DEVICE_ID:
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@ -3424,6 +3429,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr);
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switch (pci_dev->device) {
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case QCA988X_2_0_DEVICE_ID_UBNT:
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case QCA988X_2_0_DEVICE_ID:
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hw_rev = ATH10K_HW_QCA988X;
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pci_ps = false;
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@ -72,7 +72,7 @@ static s16 ath9k_hw_get_default_nf(struct ath_hw *ah,
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s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan,
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s16 nf)
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{
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s8 noise = ath9k_hw_get_default_nf(ah, chan, 0);
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s8 noise = ATH_DEFAULT_NOISE_FLOOR;
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if (nf) {
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s8 delta = nf - ATH9K_NF_CAL_NOISE_THRESH -
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@ -24,6 +24,7 @@ static const struct usb_device_id ath9k_hif_usb_ids[] = {
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{ USB_DEVICE(0x0cf3, 0x9271) }, /* Atheros */
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{ USB_DEVICE(0x0cf3, 0x1006) }, /* Atheros */
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{ USB_DEVICE(0x0846, 0x9030) }, /* Netgear N150 */
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{ USB_DEVICE(0x07b8, 0x9271) }, /* Altai WA1011N-GU */
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{ USB_DEVICE(0x07D1, 0x3A10) }, /* Dlink Wireless 150 */
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{ USB_DEVICE(0x13D3, 0x3327) }, /* Azurewave */
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{ USB_DEVICE(0x13D3, 0x3328) }, /* Azurewave */
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@ -98,6 +98,7 @@ mt76_rx_aggr_reorder_work(struct work_struct *work)
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reorder_work.work);
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struct mt76_dev *dev = tid->dev;
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struct sk_buff_head frames;
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int nframes;
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__skb_queue_head_init(&frames);
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@ -105,14 +106,44 @@ mt76_rx_aggr_reorder_work(struct work_struct *work)
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spin_lock(&tid->lock);
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mt76_rx_aggr_check_release(tid, &frames);
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nframes = tid->nframes;
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spin_unlock(&tid->lock);
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ieee80211_queue_delayed_work(tid->dev->hw, &tid->reorder_work, REORDER_TIMEOUT);
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if (nframes)
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ieee80211_queue_delayed_work(tid->dev->hw, &tid->reorder_work,
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REORDER_TIMEOUT);
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mt76_rx_complete(dev, &frames, -1);
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local_bh_enable();
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}
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static void
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mt76_rx_aggr_check_ctl(struct sk_buff *skb, struct sk_buff_head *frames)
|
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{
|
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struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
|
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struct ieee80211_bar *bar = (struct ieee80211_bar *) skb->data;
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struct mt76_wcid *wcid = status->wcid;
|
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struct mt76_rx_tid *tid;
|
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u16 seqno;
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|
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if (!ieee80211_is_ctl(bar->frame_control))
|
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return;
|
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|
||||
if (!ieee80211_is_back_req(bar->frame_control))
|
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return;
|
||||
|
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status->tid = le16_to_cpu(bar->control) >> 12;
|
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seqno = le16_to_cpu(bar->start_seq_num) >> 4;
|
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tid = rcu_dereference(wcid->aggr[status->tid]);
|
||||
if (!tid)
|
||||
return;
|
||||
|
||||
spin_lock_bh(&tid->lock);
|
||||
mt76_rx_aggr_release_frames(tid, frames, seqno);
|
||||
mt76_rx_aggr_release_head(tid, frames);
|
||||
spin_unlock_bh(&tid->lock);
|
||||
}
|
||||
|
||||
void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames)
|
||||
{
|
||||
struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
|
||||
|
@ -126,9 +157,14 @@ void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames)
|
|||
__skb_queue_tail(frames, skb);
|
||||
|
||||
sta = wcid_to_sta(wcid);
|
||||
if (!sta || !status->aggr)
|
||||
if (!sta)
|
||||
return;
|
||||
|
||||
if (!status->aggr) {
|
||||
mt76_rx_aggr_check_ctl(skb, frames);
|
||||
return;
|
||||
}
|
||||
|
||||
tid = rcu_dereference(wcid->aggr[status->tid]);
|
||||
if (!tid)
|
||||
return;
|
||||
|
|
|
@ -276,6 +276,7 @@ int mt76_register_device(struct mt76_dev *dev, bool vht,
|
|||
ieee80211_hw_set(hw, TX_AMSDU);
|
||||
ieee80211_hw_set(hw, TX_FRAG_LIST);
|
||||
ieee80211_hw_set(hw, MFP_CAPABLE);
|
||||
ieee80211_hw_set(hw, AP_LINK_PS);
|
||||
|
||||
wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
|
||||
|
||||
|
@ -470,6 +471,53 @@ mt76_check_ccmp_pn(struct sk_buff *skb)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
mt76_check_ps(struct mt76_dev *dev, struct sk_buff *skb)
|
||||
{
|
||||
struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
|
||||
struct ieee80211_sta *sta;
|
||||
struct mt76_wcid *wcid = status->wcid;
|
||||
bool ps;
|
||||
|
||||
if (!wcid || !wcid->sta)
|
||||
return;
|
||||
|
||||
sta = container_of((void *) wcid, struct ieee80211_sta, drv_priv);
|
||||
|
||||
if (!test_bit(MT_WCID_FLAG_CHECK_PS, &wcid->flags))
|
||||
return;
|
||||
|
||||
if (ieee80211_is_pspoll(hdr->frame_control)) {
|
||||
ieee80211_sta_pspoll(sta);
|
||||
return;
|
||||
}
|
||||
|
||||
if (ieee80211_has_morefrags(hdr->frame_control) ||
|
||||
!(ieee80211_is_mgmt(hdr->frame_control) ||
|
||||
ieee80211_is_data(hdr->frame_control)))
|
||||
return;
|
||||
|
||||
ps = ieee80211_has_pm(hdr->frame_control);
|
||||
|
||||
if (ps && (ieee80211_is_data_qos(hdr->frame_control) ||
|
||||
ieee80211_is_qos_nullfunc(hdr->frame_control)))
|
||||
ieee80211_sta_uapsd_trigger(sta, status->tid);
|
||||
|
||||
if (!!test_bit(MT_WCID_FLAG_PS, &wcid->flags) == ps)
|
||||
return;
|
||||
|
||||
if (ps) {
|
||||
set_bit(MT_WCID_FLAG_PS, &wcid->flags);
|
||||
mt76_stop_tx_queues(dev, sta, true);
|
||||
} else {
|
||||
clear_bit(MT_WCID_FLAG_PS, &wcid->flags);
|
||||
}
|
||||
|
||||
ieee80211_sta_ps_transition(sta, ps);
|
||||
dev->drv->sta_ps(dev, sta, ps);
|
||||
}
|
||||
|
||||
void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
|
||||
int queue)
|
||||
{
|
||||
|
@ -498,8 +546,10 @@ void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q)
|
|||
|
||||
__skb_queue_head_init(&frames);
|
||||
|
||||
while ((skb = __skb_dequeue(&dev->rx_skb[q])) != NULL)
|
||||
while ((skb = __skb_dequeue(&dev->rx_skb[q])) != NULL) {
|
||||
mt76_check_ps(dev, skb);
|
||||
mt76_rx_aggr_reorder(skb, &frames);
|
||||
}
|
||||
|
||||
mt76_rx_complete(dev, &frames, q);
|
||||
}
|
||||
|
|
|
@ -121,11 +121,18 @@ struct mt76_queue_ops {
|
|||
void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
|
||||
};
|
||||
|
||||
enum mt76_wcid_flags {
|
||||
MT_WCID_FLAG_CHECK_PS,
|
||||
MT_WCID_FLAG_PS,
|
||||
};
|
||||
|
||||
struct mt76_wcid {
|
||||
struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
|
||||
|
||||
struct work_struct aggr_work;
|
||||
|
||||
unsigned long flags;
|
||||
|
||||
u8 idx;
|
||||
u8 hw_key_idx;
|
||||
|
||||
|
@ -206,6 +213,9 @@ struct mt76_driver_ops {
|
|||
struct sk_buff *skb);
|
||||
|
||||
void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
|
||||
|
||||
void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
|
||||
bool ps);
|
||||
};
|
||||
|
||||
struct mt76_channel_state {
|
||||
|
|
|
@ -218,6 +218,8 @@ void mt76x2_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
|
|||
void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
|
||||
struct sk_buff *skb);
|
||||
|
||||
void mt76x2_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps);
|
||||
|
||||
void mt76x2_update_channel(struct mt76_dev *mdev);
|
||||
|
||||
s8 mt76x2_tx_get_max_txpwr_adj(struct mt76x2_dev *dev,
|
||||
|
|
|
@ -630,6 +630,7 @@ struct mt76x2_dev *mt76x2_alloc_device(struct device *pdev)
|
|||
.tx_complete_skb = mt76x2_tx_complete_skb,
|
||||
.rx_skb = mt76x2_queue_rx_skb,
|
||||
.rx_poll_complete = mt76x2_rx_poll_complete,
|
||||
.sta_ps = mt76x2_sta_ps,
|
||||
};
|
||||
struct ieee80211_hw *hw;
|
||||
struct mt76x2_dev *dev;
|
||||
|
|
|
@ -341,7 +341,7 @@ int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
|
|||
|
||||
mt76x2_remove_hdr_pad(skb, pad_len);
|
||||
|
||||
if (rxinfo & MT_RXINFO_BA)
|
||||
if ((rxinfo & MT_RXINFO_BA) && !(rxinfo & MT_RXINFO_NULL))
|
||||
status->aggr = true;
|
||||
|
||||
if (WARN_ON_ONCE(len > skb->len))
|
||||
|
|
|
@ -282,6 +282,9 @@ mt76x2_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
|
||||
mt76x2_txq_init(dev, sta->txq[i]);
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_AP)
|
||||
set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
|
||||
|
||||
rcu_assign_pointer(dev->wcid[idx], &msta->wcid);
|
||||
|
||||
out:
|
||||
|
@ -311,23 +314,14 @@ mt76x2_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
mt76x2_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
|
||||
void
|
||||
mt76x2_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
|
||||
{
|
||||
struct mt76x2_sta *msta = (struct mt76x2_sta *) sta->drv_priv;
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
|
||||
int idx = msta->wcid.idx;
|
||||
|
||||
switch (cmd) {
|
||||
case STA_NOTIFY_SLEEP:
|
||||
mt76x2_mac_wcid_set_drop(dev, idx, true);
|
||||
mt76_stop_tx_queues(&dev->mt76, sta, true);
|
||||
break;
|
||||
case STA_NOTIFY_AWAKE:
|
||||
mt76x2_mac_wcid_set_drop(dev, idx, false);
|
||||
break;
|
||||
}
|
||||
mt76x2_mac_wcid_set_drop(dev, idx, ps);
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -549,6 +543,12 @@ static void mt76x2_set_coverage_class(struct ieee80211_hw *hw,
|
|||
mutex_unlock(&dev->mutex);
|
||||
}
|
||||
|
||||
static int
|
||||
mt76x2_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
const struct ieee80211_ops mt76x2_ops = {
|
||||
.tx = mt76x2_tx,
|
||||
.start = mt76x2_start,
|
||||
|
@ -560,7 +560,6 @@ const struct ieee80211_ops mt76x2_ops = {
|
|||
.bss_info_changed = mt76x2_bss_info_changed,
|
||||
.sta_add = mt76x2_sta_add,
|
||||
.sta_remove = mt76x2_sta_remove,
|
||||
.sta_notify = mt76x2_sta_notify,
|
||||
.set_key = mt76x2_set_key,
|
||||
.conf_tx = mt76x2_conf_tx,
|
||||
.sw_scan_start = mt76x2_sw_scan,
|
||||
|
@ -573,5 +572,6 @@ const struct ieee80211_ops mt76x2_ops = {
|
|||
.release_buffered_frames = mt76_release_buffered_frames,
|
||||
.set_coverage_class = mt76x2_set_coverage_class,
|
||||
.get_survey = mt76_get_survey,
|
||||
.set_tim = mt76x2_set_tim,
|
||||
};
|
||||
|
||||
|
|
|
@ -1123,7 +1123,7 @@ static u8 _rtl8821ae_dbi_read(struct rtl_priv *rtlpriv, u16 addr)
|
|||
}
|
||||
if (0 == tmp) {
|
||||
read_addr = REG_DBI_RDATA + addr % 4;
|
||||
ret = rtl_read_word(rtlpriv, read_addr);
|
||||
ret = rtl_read_byte(rtlpriv, read_addr);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
@ -1165,7 +1165,8 @@ static void _rtl8821ae_enable_aspm_back_door(struct ieee80211_hw *hw)
|
|||
}
|
||||
|
||||
tmp = _rtl8821ae_dbi_read(rtlpriv, 0x70f);
|
||||
_rtl8821ae_dbi_write(rtlpriv, 0x70f, tmp | BIT(7));
|
||||
_rtl8821ae_dbi_write(rtlpriv, 0x70f, tmp | BIT(7) |
|
||||
ASPM_L1_LATENCY << 3);
|
||||
|
||||
tmp = _rtl8821ae_dbi_read(rtlpriv, 0x719);
|
||||
_rtl8821ae_dbi_write(rtlpriv, 0x719, tmp | BIT(3) | BIT(4));
|
||||
|
|
|
@ -99,6 +99,7 @@
|
|||
#define RTL_USB_MAX_RX_COUNT 100
|
||||
#define QBSS_LOAD_SIZE 5
|
||||
#define MAX_WMMELE_LENGTH 64
|
||||
#define ASPM_L1_LATENCY 7
|
||||
|
||||
#define TOTAL_CAM_ENTRY 32
|
||||
|
||||
|
|
|
@ -31,7 +31,7 @@ config SSB_BLOCKIO
|
|||
|
||||
config SSB_PCIHOST_POSSIBLE
|
||||
bool
|
||||
depends on SSB && (PCI = y || PCI = SSB) && PCI_DRIVERS_LEGACY
|
||||
depends on SSB && (PCI = y || PCI = SSB) && (PCI_DRIVERS_LEGACY || !MIPS)
|
||||
default y
|
||||
|
||||
config SSB_PCIHOST
|
||||
|
|
|
@ -149,6 +149,8 @@
|
|||
#define PCI_VENDOR_ID_DYNALINK 0x0675
|
||||
#define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702
|
||||
|
||||
#define PCI_VENDOR_ID_UBIQUITI 0x0777
|
||||
|
||||
#define PCI_VENDOR_ID_BERKOM 0x0871
|
||||
#define PCI_DEVICE_ID_BERKOM_A1T 0xffa1
|
||||
#define PCI_DEVICE_ID_BERKOM_T_CONCEPT 0xffa2
|
||||
|
|
Loading…
Reference in New Issue