Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] SMTC: Make ack_bad_irq() safe with no IM backstop.
This commit is contained in:
commit
e0b9d139f2
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@ -177,10 +177,7 @@ handle_real_irq:
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outb(cached_master_mask, PIC_MASTER_IMR);
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outb(cached_master_mask, PIC_MASTER_IMR);
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outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */
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outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */
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}
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}
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#ifdef CONFIG_MIPS_MT_SMTC
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smtc_im_ack_irq(irq);
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if (irq_hwmask[irq] & ST0_IM)
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set_c0_status(irq_hwmask[irq] & ST0_IM);
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#endif /* CONFIG_MIPS_MT_SMTC */
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spin_unlock_irqrestore(&i8259A_lock, flags);
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spin_unlock_irqrestore(&i8259A_lock, flags);
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return;
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return;
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@ -52,11 +52,8 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
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mask_msc_irq(irq);
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mask_msc_irq(irq);
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if (!cpu_has_veic)
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if (!cpu_has_veic)
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MSCIC_WRITE(MSC01_IC_EOI, 0);
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MSCIC_WRITE(MSC01_IC_EOI, 0);
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#ifdef CONFIG_MIPS_MT_SMTC
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/* This actually needs to be a call into platform code */
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/* This actually needs to be a call into platform code */
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if (irq_hwmask[irq] & ST0_IM)
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smtc_im_ack_irq(irq);
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set_c0_status(irq_hwmask[irq] & ST0_IM);
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#endif /* CONFIG_MIPS_MT_SMTC */
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}
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}
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/*
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/*
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@ -73,10 +70,7 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
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MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
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MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
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MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
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MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
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}
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}
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#ifdef CONFIG_MIPS_MT_SMTC
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smtc_im_ack_irq(irq);
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if (irq_hwmask[irq] & ST0_IM)
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set_c0_status(irq_hwmask[irq] & ST0_IM);
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#endif /* CONFIG_MIPS_MT_SMTC */
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}
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}
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/*
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/*
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@ -74,20 +74,12 @@ EXPORT_SYMBOL_GPL(free_irqno);
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*/
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*/
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void ack_bad_irq(unsigned int irq)
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void ack_bad_irq(unsigned int irq)
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{
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{
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smtc_im_ack_irq(irq);
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printk("unexpected IRQ # %d\n", irq);
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printk("unexpected IRQ # %d\n", irq);
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}
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}
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atomic_t irq_err_count;
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atomic_t irq_err_count;
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#ifdef CONFIG_MIPS_MT_SMTC
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/*
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* SMTC Kernel needs to manipulate low-level CPU interrupt mask
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* in do_IRQ. These are passed in setup_irq_smtc() and stored
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* in this table.
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*/
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unsigned long irq_hwmask[NR_IRQS];
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#endif /* CONFIG_MIPS_MT_SMTC */
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/*
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/*
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* Generic, controller-independent functions:
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* Generic, controller-independent functions:
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*/
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*/
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@ -25,8 +25,11 @@
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#include <asm/smtc_proc.h>
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#include <asm/smtc_proc.h>
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/*
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/*
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* This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set.
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* SMTC Kernel needs to manipulate low-level CPU interrupt mask
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* in do_IRQ. These are passed in setup_irq_smtc() and stored
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* in this table.
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*/
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*/
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unsigned long irq_hwmask[NR_IRQS];
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#define LOCK_MT_PRA() \
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#define LOCK_MT_PRA() \
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local_irq_save(flags); \
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local_irq_save(flags); \
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@ -24,7 +24,30 @@ static inline int irq_canonicalize(int irq)
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#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
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#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
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#endif
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#endif
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#ifdef CONFIG_MIPS_MT_SMTC
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struct irqaction;
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extern unsigned long irq_hwmask[];
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extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
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unsigned long hwmask);
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static inline void smtc_im_ack_irq(unsigned int irq)
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{
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if (irq_hwmask[irq] & ST0_IM)
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set_c0_status(irq_hwmask[irq] & ST0_IM);
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}
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#else
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static inline void smtc_im_ack_irq(unsigned int irq)
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{
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}
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#endif /* CONFIG_MIPS_MT_SMTC */
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#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
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#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
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/*
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/*
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* Clear interrupt mask handling "backstop" if irq_hwmask
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* Clear interrupt mask handling "backstop" if irq_hwmask
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* entry so indicates. This implies that the ack() or end()
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* entry so indicates. This implies that the ack() or end()
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@ -38,6 +61,7 @@ do { \
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~(irq_hwmask[irq] & 0x0000ff00)); \
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~(irq_hwmask[irq] & 0x0000ff00)); \
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} while (0)
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} while (0)
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#else
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#else
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#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)
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#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)
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#endif
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#endif
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@ -60,14 +84,6 @@ do { \
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extern void arch_init_irq(void);
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extern void arch_init_irq(void);
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extern void spurious_interrupt(void);
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extern void spurious_interrupt(void);
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#ifdef CONFIG_MIPS_MT_SMTC
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struct irqaction;
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extern unsigned long irq_hwmask[];
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extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
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unsigned long hwmask);
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#endif /* CONFIG_MIPS_MT_SMTC */
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extern int allocate_irqno(void);
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extern int allocate_irqno(void);
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extern void alloc_legacy_irqno(void);
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extern void alloc_legacy_irqno(void);
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extern void free_irqno(unsigned int irq);
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extern void free_irqno(unsigned int irq);
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