drm/amdgpu: explicitely sync to VM updates v2
Allows us to reduce the overhead while syncing to fences a bit. v2: also drop adev parameter from the functions Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6ceeb144b1
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@ -358,7 +358,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
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if (ret)
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return ret;
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return amdgpu_sync_fence(NULL, sync, vm->last_update, false);
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return amdgpu_sync_fence(sync, vm->last_update, false);
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}
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static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
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@ -751,7 +751,7 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev,
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amdgpu_vm_clear_freed(adev, vm, &bo_va->last_pt_update);
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amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
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amdgpu_sync_fence(sync, bo_va->last_pt_update, false);
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return 0;
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}
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@ -770,7 +770,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev,
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return ret;
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}
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return amdgpu_sync_fence(NULL, sync, bo_va->last_pt_update, false);
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return amdgpu_sync_fence(sync, bo_va->last_pt_update, false);
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}
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static int map_bo_to_gpuvm(struct amdgpu_device *adev,
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@ -2045,7 +2045,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
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pr_debug("Memory eviction: Validate BOs failed. Try again\n");
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goto validate_map_fail;
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}
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ret = amdgpu_sync_fence(NULL, &sync_obj, bo->tbo.moving, false);
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ret = amdgpu_sync_fence(&sync_obj, bo->tbo.moving, false);
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if (ret) {
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pr_debug("Memory eviction: Sync BO fence failed. Try again\n");
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goto validate_map_fail;
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@ -797,29 +797,23 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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r = amdgpu_sync_fence(adev, &p->job->sync,
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fpriv->prt_va->last_pt_update, false);
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r = amdgpu_sync_vm_fence(&p->job->sync, fpriv->prt_va->last_pt_update);
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if (r)
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return r;
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if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) {
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struct dma_fence *f;
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bo_va = fpriv->csa_va;
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BUG_ON(!bo_va);
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r = amdgpu_vm_bo_update(adev, bo_va, false);
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if (r)
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return r;
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f = bo_va->last_pt_update;
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r = amdgpu_sync_fence(adev, &p->job->sync, f, false);
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r = amdgpu_sync_vm_fence(&p->job->sync, bo_va->last_pt_update);
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if (r)
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return r;
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}
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amdgpu_bo_list_for_each_entry(e, p->bo_list) {
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struct dma_fence *f;
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/* ignore duplicates */
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bo = ttm_to_amdgpu_bo(e->tv.bo);
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if (!bo)
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@ -833,8 +827,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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f = bo_va->last_pt_update;
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r = amdgpu_sync_fence(adev, &p->job->sync, f, false);
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r = amdgpu_sync_vm_fence(&p->job->sync, bo_va->last_pt_update);
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if (r)
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return r;
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}
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@ -847,7 +840,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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r = amdgpu_sync_fence(adev, &p->job->sync, vm->last_update, false);
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r = amdgpu_sync_vm_fence(&p->job->sync, vm->last_update);
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if (r)
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return r;
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@ -989,7 +982,7 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
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dma_fence_put(old);
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}
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r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);
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r = amdgpu_sync_fence(&p->job->sync, fence, true);
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dma_fence_put(fence);
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if (r)
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return r;
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@ -1011,7 +1004,7 @@ static int amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p,
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return r;
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}
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r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);
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r = amdgpu_sync_fence(&p->job->sync, fence, true);
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dma_fence_put(fence);
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return r;
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@ -206,7 +206,7 @@ static int amdgpu_vmid_grab_idle(struct amdgpu_vm *vm,
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int r;
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if (ring->vmid_wait && !dma_fence_is_signaled(ring->vmid_wait))
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return amdgpu_sync_fence(adev, sync, ring->vmid_wait, false);
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return amdgpu_sync_fence(sync, ring->vmid_wait, false);
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fences = kmalloc_array(sizeof(void *), id_mgr->num_ids, GFP_KERNEL);
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if (!fences)
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@ -241,7 +241,7 @@ static int amdgpu_vmid_grab_idle(struct amdgpu_vm *vm,
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return -ENOMEM;
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}
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r = amdgpu_sync_fence(adev, sync, &array->base, false);
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r = amdgpu_sync_fence(sync, &array->base, false);
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dma_fence_put(ring->vmid_wait);
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ring->vmid_wait = &array->base;
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return r;
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@ -294,7 +294,7 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm,
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tmp = amdgpu_sync_peek_fence(&(*id)->active, ring);
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if (tmp) {
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*id = NULL;
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r = amdgpu_sync_fence(adev, sync, tmp, false);
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r = amdgpu_sync_fence(sync, tmp, false);
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return r;
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}
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needs_flush = true;
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@ -303,7 +303,7 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm,
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/* Good we can use this VMID. Remember this submission as
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* user of the VMID.
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*/
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r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false);
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r = amdgpu_sync_fence(&(*id)->active, fence, false);
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if (r)
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return r;
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@ -375,7 +375,7 @@ static int amdgpu_vmid_grab_used(struct amdgpu_vm *vm,
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/* Good, we can use this VMID. Remember this submission as
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* user of the VMID.
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*/
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r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false);
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r = amdgpu_sync_fence(&(*id)->active, fence, false);
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if (r)
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return r;
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@ -435,8 +435,7 @@ int amdgpu_vmid_grab(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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id = idle;
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/* Remember this submission as user of the VMID */
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r = amdgpu_sync_fence(ring->adev, &id->active,
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fence, false);
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r = amdgpu_sync_fence(&id->active, fence, false);
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if (r)
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goto error;
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@ -193,8 +193,7 @@ static struct dma_fence *amdgpu_job_dependency(struct drm_sched_job *sched_job,
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fence = amdgpu_sync_get_fence(&job->sync, &explicit);
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if (fence && explicit) {
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if (drm_sched_dependency_optimized(fence, s_entity)) {
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r = amdgpu_sync_fence(ring->adev, &job->sched_sync,
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fence, false);
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r = amdgpu_sync_fence(&job->sched_sync, fence, false);
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if (r)
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DRM_ERROR("Error adding fence (%d)\n", r);
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}
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@ -129,7 +129,8 @@ static void amdgpu_sync_keep_later(struct dma_fence **keep,
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* Tries to add the fence to an existing hash entry. Returns true when an entry
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* was found, false otherwise.
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*/
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static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f, bool explicit)
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static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f,
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bool explicit)
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{
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struct amdgpu_sync_entry *e;
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@ -151,19 +152,18 @@ static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f,
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* amdgpu_sync_fence - remember to sync to this fence
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*
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* @sync: sync object to add fence to
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* @fence: fence to sync to
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* @f: fence to sync to
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* @explicit: if this is an explicit dependency
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*
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* Add the fence to the sync object.
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*/
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int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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struct dma_fence *f, bool explicit)
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int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f,
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bool explicit)
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{
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struct amdgpu_sync_entry *e;
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if (!f)
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return 0;
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if (amdgpu_sync_same_dev(adev, f) &&
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amdgpu_sync_get_owner(f) == AMDGPU_FENCE_OWNER_VM)
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amdgpu_sync_keep_later(&sync->last_vm_update, f);
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if (amdgpu_sync_add_later(sync, f, explicit))
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return 0;
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@ -179,6 +179,24 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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return 0;
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}
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/**
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* amdgpu_sync_vm_fence - remember to sync to this VM fence
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*
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* @adev: amdgpu device
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* @sync: sync object to add fence to
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* @fence: the VM fence to add
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*
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* Add the fence to the sync object and remember it as VM update.
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*/
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int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence)
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{
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if (!fence)
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return 0;
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amdgpu_sync_keep_later(&sync->last_vm_update, fence);
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return amdgpu_sync_fence(sync, fence, false);
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}
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/**
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* amdgpu_sync_resv - sync to a reservation object
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*
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@ -204,7 +222,7 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
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/* always sync to the exclusive fence */
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f = dma_resv_get_excl(resv);
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r = amdgpu_sync_fence(adev, sync, f, false);
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r = amdgpu_sync_fence(sync, f, false);
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flist = dma_resv_get_list(resv);
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if (!flist || r)
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@ -239,7 +257,7 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
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continue;
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}
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r = amdgpu_sync_fence(adev, sync, f, false);
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r = amdgpu_sync_fence(sync, f, false);
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if (r)
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break;
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}
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@ -340,7 +358,7 @@ int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone)
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hash_for_each_safe(source->fences, i, tmp, e, node) {
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f = e->fence;
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if (!dma_fence_is_signaled(f)) {
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r = amdgpu_sync_fence(NULL, clone, f, e->explicit);
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r = amdgpu_sync_fence(clone, f, e->explicit);
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if (r)
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return r;
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} else {
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@ -40,8 +40,9 @@ struct amdgpu_sync {
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};
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void amdgpu_sync_create(struct amdgpu_sync *sync);
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int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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struct dma_fence *f, bool explicit);
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int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f,
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bool explicit);
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int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence);
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int amdgpu_sync_resv(struct amdgpu_device *adev,
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struct amdgpu_sync *sync,
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struct dma_resv *resv,
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bool explicit_sync);
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struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
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struct amdgpu_ring *ring);
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struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, bool *explicit);
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struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync,
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bool *explicit);
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int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone);
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int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
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void amdgpu_sync_free(struct amdgpu_sync *sync);
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@ -71,7 +71,7 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
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p->num_dw_left = ndw;
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/* Wait for moves to be completed */
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r = amdgpu_sync_fence(p->adev, &p->job->sync, exclusive, false);
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r = amdgpu_sync_fence(&p->job->sync, exclusive, false);
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if (r)
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return r;
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