From c104b6a2ed27210e1756e075b5fcbf20c17a71ca Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 25 Sep 2012 11:49:33 +0200 Subject: [PATCH 01/12] ARM i.MX dtsi: Add default bus-width property for esdhc controller According to Documentation/devicetree/bindings/mmc/mmc.txt bus-width is a mandatory property. While this is currently enforced nowhere, it's a good habit to just add the property now to allow to add common helper functionality for the mmc property parsing later. Signed-off-by: Sascha Hauer Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx51.dtsi | 3 +++ arch/arm/boot/dts/imx53.dtsi | 4 ++++ arch/arm/boot/dts/imx6q.dtsi | 4 ++++ 3 files changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 54aea74769a1..0bc8ae701967 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -87,6 +87,7 @@ compatible = "fsl,imx51-esdhc"; reg = <0x70008000 0x4000>; interrupts = <2>; + bus-width = <4>; status = "disabled"; }; @@ -119,6 +120,7 @@ compatible = "fsl,imx51-esdhc"; reg = <0x70020000 0x4000>; interrupts = <3>; + bus-width = <4>; status = "disabled"; }; @@ -126,6 +128,7 @@ compatible = "fsl,imx51-esdhc"; reg = <0x70024000 0x4000>; interrupts = <4>; + bus-width = <4>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index caf09ff73f10..a5dd4ce6fd02 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -85,6 +85,7 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50004000 0x4000>; interrupts = <1>; + bus-width = <4>; status = "disabled"; }; @@ -92,6 +93,7 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50008000 0x4000>; interrupts = <2>; + bus-width = <4>; status = "disabled"; }; @@ -124,6 +126,7 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50020000 0x4000>; interrupts = <3>; + bus-width = <4>; status = "disabled"; }; @@ -131,6 +134,7 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50024000 0x4000>; interrupts = <4>; + bus-width = <4>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f604a44a5c66..663fb869eb20 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -849,6 +849,7 @@ interrupts = <0 22 0x04>; clocks = <&clks 163>, <&clks 163>, <&clks 163>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; @@ -858,6 +859,7 @@ interrupts = <0 23 0x04>; clocks = <&clks 164>, <&clks 164>, <&clks 164>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; @@ -867,6 +869,7 @@ interrupts = <0 24 0x04>; clocks = <&clks 165>, <&clks 165>, <&clks 165>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; @@ -876,6 +879,7 @@ interrupts = <0 25 0x04>; clocks = <&clks 166>, <&clks 166>, <&clks 166>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; From e9dc615c50fc6436741889b82380b4bde3765a87 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 26 Sep 2012 20:27:35 -0300 Subject: [PATCH 02/12] ARM: dts: imx53-qsb: Use pinctrl for gpio-led Since commit 8fe4554f (leds: leds-gpio: adopt pinctrl support) gpio-led driver has pinctrl support, so setup the gpio led pin via pinctrl and avoid the following warning: leds-gpio leds.2: pins are not configured from the driver Signed-off-by: Fabio Estevam Reviewed-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53-qsb.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index 08948af86d1a..5bae4c76979a 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -60,10 +60,16 @@ 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ + >; + }; + + led_pin_gpio7_7: led_gpio7_7@0 { + fsl,pins = < 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ >; }; }; + }; uart1: serial@53fbc000 { @@ -216,6 +222,8 @@ leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_gpio7_7>; user { label = "Heartbeat"; From 2a3246713560344254bf96aa00def0cae26d564f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 26 Sep 2012 20:27:36 -0300 Subject: [PATCH 03/12] ARM: dts: imx53-qsb: Make DA9053 regulator functional Setup the GPIO7_11 pin as interrupt to the DA9053 and also rename the regulator nodes so that they match with the datasheet. This allows probing of DA9053 to succeed. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53-qsb.dts | 54 ++++++++++++++++++++++----------- 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index 5bae4c76979a..b0075537195b 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -60,6 +60,7 @@ 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ + 1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */ >; }; @@ -106,76 +107,93 @@ pmic: dialog@48 { compatible = "dlg,da9053-aa", "dlg,da9052"; reg = <0x48>; + interrupt-parent = <&gpio7>; + interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */ regulators { - buck0 { + buck1_reg: buck1 { regulator-min-microvolt = <500000>; regulator-max-microvolt = <2075000>; + regulator-always-on; }; - buck1 { + buck2_reg: buck2 { regulator-min-microvolt = <500000>; regulator-max-microvolt = <2075000>; + regulator-always-on; }; - buck2 { + buck3_reg: buck3 { regulator-min-microvolt = <925000>; regulator-max-microvolt = <2500000>; + regulator-always-on; }; - buck3 { + buck4_reg: buck4 { regulator-min-microvolt = <925000>; regulator-max-microvolt = <2500000>; + regulator-always-on; }; - ldo4 { + ldo1_reg: ldo1 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; }; - ldo5 { + ldo2_reg: ldo2 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: ldo3 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; - ldo6 { + ldo4_reg: ldo4 { regulator-min-microvolt = <1725000>; regulator-max-microvolt = <3300000>; + regulator-always-on; }; - ldo7 { + ldo5_reg: ldo5 { regulator-min-microvolt = <1725000>; regulator-max-microvolt = <3300000>; + regulator-always-on; }; - ldo8 { + ldo6_reg: ldo6 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo9 { + ldo7_reg: ldo7 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo10 { + ldo8_reg: ldo8 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo11 { + ldo9_reg: ldo9 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo12 { + ldo10_reg: ldo10 { regulator-min-microvolt = <1250000>; regulator-max-microvolt = <3650000>; - }; - - ldo13 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; + regulator-always-on; }; }; }; From 49c9e60eaaa966cdb02ac9e989eeb6f940691c5d Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 8 Oct 2012 13:44:29 +0800 Subject: [PATCH 04/12] ARM: imx6q: let users input debug uart port number imx6q gets 5 uart ports in total. Different board design may choose different port as debug uart. For example, imx6q-sabresd uses UART1, imx6q-sabrelite uses UART2 and imx6q-arm2 uses UART4. Rather than bloating DEBUG_LL choice list with all these uart ports, the patch introduces DEBUG_IMX6Q_UART_PORT for users to input uart port number when DEBUG_IMX6Q_UART is selected inside DEBUG_LL choice. Signed-off-by: Shawn Guo --- arch/arm/Kconfig.debug | 26 +++++++++++++------------- arch/arm/include/debug/imx.S | 20 ++++++++++++++++---- arch/arm/mach-imx/lluart.c | 28 ++++++++++++++++++---------- arch/arm/mach-imx/mx6q.h | 4 ---- 4 files changed, 47 insertions(+), 31 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5566520686a5..5dc7109dffc6 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -209,20 +209,12 @@ choice Say Y here if you want kernel low-level debugging support on i.MX50 or i.MX53. - config DEBUG_IMX6Q_UART2 - bool "i.MX6Q Debug UART2" + config DEBUG_IMX6Q_UART + bool "i.MX6Q Debug UART" depends on SOC_IMX6Q help Say Y here if you want kernel low-level debugging support - on i.MX6Q UART2. This is correct for e.g. the SabreLite - board. - - config DEBUG_IMX6Q_UART4 - bool "i.MX6Q Debug UART4" - depends on SOC_IMX6Q - help - Say Y here if you want kernel low-level debugging support - on i.MX6Q UART4. + on i.MX6Q. config DEBUG_MMP_UART2 bool "Kernel low-level debugging message via MMP UART2" @@ -409,6 +401,15 @@ choice endchoice +config DEBUG_IMX6Q_UART_PORT + int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART + range 1 5 + default 1 + depends on SOC_IMX6Q + help + Choose UART port on which kernel low-level debug messages + should be output. + config DEBUG_LL_INCLUDE string default "debug/icedcc.S" if DEBUG_ICEDCC @@ -418,8 +419,7 @@ config DEBUG_LL_INCLUDE DEBUG_IMX31_IMX35_UART || \ DEBUG_IMX51_UART || \ DEBUG_IMX50_IMX53_UART ||\ - DEBUG_IMX6Q_UART2 || \ - DEBUG_IMX6Q_UART4 + DEBUG_IMX6Q_UART default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S index 0b65d792f664..0c4e17d4d359 100644 --- a/arch/arm/include/debug/imx.S +++ b/arch/arm/include/debug/imx.S @@ -10,6 +10,20 @@ * published by the Free Software Foundation. * */ +#define IMX6Q_UART1_BASE_ADDR 0x02020000 +#define IMX6Q_UART2_BASE_ADDR 0x021e8000 +#define IMX6Q_UART3_BASE_ADDR 0x021ec000 +#define IMX6Q_UART4_BASE_ADDR 0x021f0000 +#define IMX6Q_UART5_BASE_ADDR 0x021f4000 + +/* + * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion + * of IMX6Q_UART##n##_BASE_ADDR. + */ +#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR +#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) +#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) + #ifdef CONFIG_DEBUG_IMX1_UART #define UART_PADDR 0x00206000 #elif defined (CONFIG_DEBUG_IMX25_UART) @@ -22,10 +36,8 @@ #define UART_PADDR 0x73fbc000 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) #define UART_PADDR 0x53fbc000 -#elif defined (CONFIG_DEBUG_IMX6Q_UART2) -#define UART_PADDR 0x021e8000 -#elif defined (CONFIG_DEBUG_IMX6Q_UART4) -#define UART_PADDR 0x021f0000 +#elif defined (CONFIG_DEBUG_IMX6Q_UART) +#define UART_PADDR IMX6Q_DEBUG_UART_BASE #endif /* diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c index 5f1510363ee7..2fdc9bf2fb5e 100644 --- a/arch/arm/mach-imx/lluart.c +++ b/arch/arm/mach-imx/lluart.c @@ -17,17 +17,25 @@ #include "hardware.h" +#define IMX6Q_UART1_BASE_ADDR 0x02020000 +#define IMX6Q_UART2_BASE_ADDR 0x021e8000 +#define IMX6Q_UART3_BASE_ADDR 0x021ec000 +#define IMX6Q_UART4_BASE_ADDR 0x021f0000 +#define IMX6Q_UART5_BASE_ADDR 0x021f4000 + +/* + * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion + * of IMX6Q_UART##n##_BASE_ADDR. + */ +#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR +#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) +#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) + static struct map_desc imx_lluart_desc = { -#ifdef CONFIG_DEBUG_IMX6Q_UART2 - .virtual = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR), - .pfn = __phys_to_pfn(MX6Q_UART2_BASE_ADDR), - .length = MX6Q_UART2_SIZE, - .type = MT_DEVICE, -#endif -#ifdef CONFIG_DEBUG_IMX6Q_UART4 - .virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR), - .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), - .length = MX6Q_UART4_SIZE, +#ifdef CONFIG_DEBUG_IMX6Q_UART + .virtual = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE), + .pfn = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE), + .length = 0x4000, .type = MT_DEVICE, #endif }; diff --git a/arch/arm/mach-imx/mx6q.h b/arch/arm/mach-imx/mx6q.h index f7e7dbac8f4b..19d3f54db5af 100644 --- a/arch/arm/mach-imx/mx6q.h +++ b/arch/arm/mach-imx/mx6q.h @@ -27,9 +27,5 @@ #define MX6Q_CCM_SIZE 0x4000 #define MX6Q_ANATOP_BASE_ADDR 0x020c8000 #define MX6Q_ANATOP_SIZE 0x1000 -#define MX6Q_UART2_BASE_ADDR 0x021e8000 -#define MX6Q_UART2_SIZE 0x4000 -#define MX6Q_UART4_BASE_ADDR 0x021f0000 -#define MX6Q_UART4_SIZE 0x4000 #endif /* __MACH_MX6Q_H__ */ From 5c70cb01b89895189025f8de8ee2823f516eab6a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 7 Oct 2012 14:12:49 -0300 Subject: [PATCH 05/12] ARM: dts: imx6q-sabreauto: Add basic support mx6qsabreauto is a board based on mx6q SoC with the following features: - 2GB of DDR3 - 2 USB ports - 1 HDMI output port - SPI NOR - 2 LVDS LCD ports - Gigabit Ethernet - Camera - eMMC and SD card slot - Multichannel Audio - CAN - SATA - NAND - PCIE - Video Input Add very basic support for it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.txt | 4 ++ arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6q-sabreauto.dts | 64 +++++++++++++++++++ 3 files changed, 69 insertions(+) create mode 100644 arch/arm/boot/dts/imx6q-sabreauto.dts diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index ac9e7516756e..f79818711e83 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -41,6 +41,10 @@ i.MX6 Quad SABRE Smart Device Board Required root node properties: - compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; +i.MX6 Quad SABRE Automotive Board +Required root node properties: + - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; + Generic i.MX boards ------------------- diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index c1ce813fcc4a..ccafe36679b9 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -49,6 +49,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \ imx53-qsb.dtb \ imx53-smd.dtb \ imx6q-arm2.dtb \ + imx6q-sabreauto.dtb \ imx6q-sabrelite.dtb \ imx6q-sabresd.dtb dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts new file mode 100644 index 000000000000..826e4ad1477e --- /dev/null +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts @@ -0,0 +1,64 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx6q.dtsi" + +/ { + model = "Freescale i.MX6 Quad SABRE Automotive Board"; + compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x80000000>; + }; + + soc { + aips-bus@02000000 { /* AIPS1 */ + iomuxc@020e0000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + hog { + pinctrl_hog: hoggrp { + fsl,pins = < + 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */ + 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */ + >; + }; + }; + }; + }; + + aips-bus@02100000 { /* AIPS2 */ + uart4: serial@021f0000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4_1>; + status = "okay"; + }; + + ethernet@02188000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet_2>; + phy-mode = "rgmii"; + status = "okay"; + }; + + usdhc@02198000 { /* uSDHC3 */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3_1>; + cd-gpios = <&gpio6 15 0>; + wp-gpios = <&gpio1 13 0>; + status = "okay"; + }; + }; + }; +}; From c92503886c9e566708a05f92a99c9c3fe71f4348 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 2 Jul 2012 20:13:03 +0800 Subject: [PATCH 06/12] ARM: dts: imx6q: enable snvs lp rtc Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 663fb869eb20..255f56b124e6 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -505,8 +505,16 @@ }; snvs@020cc000 { - reg = <0x020cc000 0x4000>; - interrupts = <0 19 0x04 0 20 0x04>; + compatible = "fsl,sec-v4.0-mon", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x020cc000 0x4000>; + + snvs-rtc-lp@34 { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + reg = <0x34 0x58>; + interrupts = <0 19 0x04 0 20 0x04>; + }; }; epit@020d0000 { /* EPIT1 */ From d90df97863c7838847abd0f144c71db60aa00643 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 19 Jul 2012 23:16:30 +0800 Subject: [PATCH 07/12] ARM: imx: enable cpufreq for imx6q It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 10 +++++++++- arch/arm/mach-imx/Kconfig | 3 +++ arch/arm/mach-imx/clk-imx6q.c | 1 + 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 255f56b124e6..1565aea59ebb 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -36,6 +36,14 @@ compatible = "arm,cortex-a9"; reg = <0>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 792000 1100000 + 396000 950000 + 198000 850000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + cpu0-supply = <®_cpu>; }; cpu@1 { @@ -447,7 +455,7 @@ anatop-max-voltage = <2750000>; }; - regulator-vddcore@140 { + reg_cpu: regulator-vddcore@140 { compatible = "fsl,anatop-regulator"; regulator-name = "cpu"; regulator-min-microvolt = <725000>; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index f1bf610e2900..01bf72c56c01 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -829,6 +829,8 @@ config SOC_IMX53 config SOC_IMX6Q bool "i.MX6 Quad support" + select ARCH_HAS_CPUFREQ + select ARCH_HAS_OPP select ARM_CPU_SUSPEND if PM select ARM_GIC select COMMON_CLK @@ -841,6 +843,7 @@ config SOC_IMX6Q select MFD_SYSCON select PINCTRL select PINCTRL_IMX6Q + select PM_OPP if PM help This enables support for Freescale i.MX6 Quad processor. diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index e5a82bb95b52..5f9f5919dd74 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -406,6 +406,7 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); clk_register_clkdev(clk[ahb], "ahb", NULL); clk_register_clkdev(clk[cko1], "cko1", NULL); + clk_register_clkdev(clk[arm], NULL, "cpu0"); /* * The gpmi needs 100MHz frequency in the EDO/Sync mode, From a1fff236b43dfe6394fd04b0302f5a261e1cc3e5 Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Thu, 25 Oct 2012 13:26:39 +0200 Subject: [PATCH 08/12] ARM: dts: imx53: pinctl update This patch supplements pinctl support on i.MX53. Signed-off-by: Roland Stigge Acked-by: Sascha Hauer Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53.dtsi | 46 ++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index a5dd4ce6fd02..8b33195a5a33 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -320,6 +320,24 @@ }; }; + can1 { + pinctrl_can1_1: can1grp-1 { + fsl,pins = < + 847 0x80000000 /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */ + 853 0x80000000 /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */ + >; + }; + }; + + can2 { + pinctrl_can2_1: can2grp-1 { + fsl,pins = < + 67 0x80000000 /* MX53_PAD_KEY_COL4__CAN2_TXCAN */ + 74 0x80000000 /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */ + >; + }; + }; + i2c1 { pinctrl_i2c1_1: i2c1grp-1 { fsl,pins = < @@ -338,6 +356,15 @@ }; }; + i2c3 { + pinctrl_i2c3_1: i2c3grp-1 { + fsl,pins = < + 1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */ + 1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */ + >; + }; + }; + uart1 { pinctrl_uart1_1: uart1grp-1 { fsl,pins = < @@ -373,6 +400,25 @@ >; }; }; + + uart4 { + pinctrl_uart4_1: uart4grp-1 { + fsl,pins = < + 11 0x1c5 /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */ + 18 0x1c5 /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */ + >; + }; + }; + + uart5 { + pinctrl_uart5_1: uart5grp-1 { + fsl,pins = < + 24 0x1c5 /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */ + 31 0x1c5 /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */ + >; + }; + }; + }; uart1: serial@53fbc000 { From 82c45705743c8f9e9662bc42f02d34731f0a24df Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Mon, 12 Nov 2012 16:26:18 +0800 Subject: [PATCH 09/12] ARM: dts: imx6q-sabresd: add volume up/down gpio keys Add volume up/down gpio keys support in imx6q-sabresd.dts. Signed-off-by: Liu Ying Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabresd.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts index e596c28c214d..a42402562b7b 100644 --- a/arch/arm/boot/dts/imx6q-sabresd.dts +++ b/arch/arm/boot/dts/imx6q-sabresd.dts @@ -38,6 +38,8 @@ hog { pinctrl_hog: hoggrp { fsl,pins = < + 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */ + 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */ 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */ 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */ 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */ @@ -73,4 +75,20 @@ }; }; }; + + gpio-keys { + compatible = "gpio-keys"; + + volume-up { + label = "Volume Up"; + gpios = <&gpio1 4 0>; + linux,code = <115>; /* KEY_VOLUMEUP */ + }; + + volume-down { + label = "Volume Down"; + gpios = <&gpio1 5 0>; + linux,code = <114>; /* KEY_VOLUMEDOWN */ + }; + }; }; From 7b7d6727344a2a7727255d61fa1bd3ff447c4f6c Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 15 Nov 2012 09:31:52 +0100 Subject: [PATCH 10/12] ARM i.MX dts: Consistently add labels to devicenodes Having labels before each node allows board bindings to reference to nodes by using the &nodename {} notation. This way boards do not have to resemble the whole devicetree layout. Due to less indention needed the board files also get better readability. Since the label make the documentation behind the nodes unnecessary it is removed. Signed-off-by: Sascha Hauer Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx27.dtsi | 5 +- arch/arm/boot/dts/imx51.dtsi | 40 ++++++++-------- arch/arm/boot/dts/imx53.dtsi | 42 ++++++++--------- arch/arm/boot/dts/imx6q.dtsi | 88 ++++++++++++++++++------------------ 4 files changed, 88 insertions(+), 87 deletions(-) diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 67d672792b0d..b8d3905915ac 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -58,7 +58,7 @@ reg = <0x10000000 0x10000000>; ranges; - wdog@10002000 { + wdog: wdog@10002000 { compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; reg = <0x10002000 0x4000>; interrupts = <27>; @@ -218,7 +218,8 @@ status = "disabled"; }; }; - nand@d8000000 { + + nfc: nand@d8000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 0bc8ae701967..1fdee31b4909 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -76,14 +76,14 @@ reg = <0x70000000 0x40000>; ranges; - esdhc@70004000 { /* ESDHC1 */ + esdhc1: esdhc@70004000 { compatible = "fsl,imx51-esdhc"; reg = <0x70004000 0x4000>; interrupts = <1>; status = "disabled"; }; - esdhc@70008000 { /* ESDHC2 */ + esdhc2: esdhc@70008000 { compatible = "fsl,imx51-esdhc"; reg = <0x70008000 0x4000>; interrupts = <2>; @@ -98,7 +98,7 @@ status = "disabled"; }; - ecspi@70010000 { /* ECSPI1 */ + ecspi1: ecspi@70010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-ecspi"; @@ -116,7 +116,7 @@ status = "disabled"; }; - esdhc@70020000 { /* ESDHC3 */ + esdhc3: esdhc@70020000 { compatible = "fsl,imx51-esdhc"; reg = <0x70020000 0x4000>; interrupts = <3>; @@ -124,7 +124,7 @@ status = "disabled"; }; - esdhc@70024000 { /* ESDHC4 */ + esdhc4: esdhc@70024000 { compatible = "fsl,imx51-esdhc"; reg = <0x70024000 0x4000>; interrupts = <4>; @@ -133,28 +133,28 @@ }; }; - usb@73f80000 { + usbotg: usb@73f80000 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; interrupts = <18>; status = "disabled"; }; - usb@73f80200 { + usbh1: usb@73f80200 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80200 0x0200>; interrupts = <14>; status = "disabled"; }; - usb@73f80400 { + usbh2: usb@73f80400 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80400 0x0200>; interrupts = <16>; status = "disabled"; }; - usb@73f80600 { + usbh3: usb@73f80600 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80600 0x0200>; interrupts = <17>; @@ -201,20 +201,20 @@ #interrupt-cells = <2>; }; - wdog@73f98000 { /* WDOG1 */ + wdog1: wdog@73f98000 { compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; reg = <0x73f98000 0x4000>; interrupts = <58>; }; - wdog@73f9c000 { /* WDOG2 */ + wdog2: wdog@73f9c000 { compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; reg = <0x73f9c000 0x4000>; interrupts = <59>; status = "disabled"; }; - iomuxc@73fa8000 { + iomuxc: iomuxc@73fa8000 { compatible = "fsl,imx51-iomuxc"; reg = <0x73fa8000 0x4000>; @@ -352,7 +352,7 @@ reg = <0x80000000 0x10000000>; ranges; - ecspi@83fac000 { /* ECSPI2 */ + ecspi2: ecspi@83fac000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-ecspi"; @@ -361,14 +361,14 @@ status = "disabled"; }; - sdma@83fb0000 { + sdma: sdma@83fb0000 { compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; reg = <0x83fb0000 0x4000>; interrupts = <6>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; }; - cspi@83fc0000 { + cspi: cspi@83fc0000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; @@ -377,7 +377,7 @@ status = "disabled"; }; - i2c@83fc4000 { /* I2C2 */ + i2c2: i2c@83fc4000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; @@ -386,7 +386,7 @@ status = "disabled"; }; - i2c@83fc8000 { /* I2C1 */ + i2c1: i2c@83fc8000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; @@ -404,13 +404,13 @@ status = "disabled"; }; - audmux@83fd0000 { + audmux: audmux@83fd0000 { compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; reg = <0x83fd0000 0x4000>; status = "disabled"; }; - nand@83fdb000 { + nfc: nand@83fdb000 { compatible = "fsl,imx51-nand"; reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; interrupts = <8>; @@ -426,7 +426,7 @@ status = "disabled"; }; - ethernet@83fec000 { + fec: ethernet@83fec000 { compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; interrupts = <87>; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 8b33195a5a33..f45d4b1e21b5 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -81,7 +81,7 @@ reg = <0x50000000 0x40000>; ranges; - esdhc@50004000 { /* ESDHC1 */ + esdhc1: esdhc@50004000 { compatible = "fsl,imx53-esdhc"; reg = <0x50004000 0x4000>; interrupts = <1>; @@ -89,7 +89,7 @@ status = "disabled"; }; - esdhc@50008000 { /* ESDHC2 */ + esdhc2: esdhc@50008000 { compatible = "fsl,imx53-esdhc"; reg = <0x50008000 0x4000>; interrupts = <2>; @@ -104,7 +104,7 @@ status = "disabled"; }; - ecspi@50010000 { /* ECSPI1 */ + ecspi1: ecspi@50010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; @@ -122,7 +122,7 @@ status = "disabled"; }; - esdhc@50020000 { /* ESDHC3 */ + esdhc3: esdhc@50020000 { compatible = "fsl,imx53-esdhc"; reg = <0x50020000 0x4000>; interrupts = <3>; @@ -130,7 +130,7 @@ status = "disabled"; }; - esdhc@50024000 { /* ESDHC4 */ + esdhc4: esdhc@50024000 { compatible = "fsl,imx53-esdhc"; reg = <0x50024000 0x4000>; interrupts = <4>; @@ -139,28 +139,28 @@ }; }; - usb@53f80000 { + usbotg: usb@53f80000 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80000 0x0200>; interrupts = <18>; status = "disabled"; }; - usb@53f80200 { + usbh1: usb@53f80200 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80200 0x0200>; interrupts = <14>; status = "disabled"; }; - usb@53f80400 { + usbh2: usb@53f80400 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80400 0x0200>; interrupts = <16>; status = "disabled"; }; - usb@53f80600 { + usbh3: usb@53f80600 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80600 0x0200>; interrupts = <17>; @@ -207,20 +207,20 @@ #interrupt-cells = <2>; }; - wdog@53f98000 { /* WDOG1 */ + wdog1: wdog@53f98000 { compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f98000 0x4000>; interrupts = <58>; }; - wdog@53f9c000 { /* WDOG2 */ + wdog2: wdog@53f9c000 { compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f9c000 0x4000>; interrupts = <59>; status = "disabled"; }; - iomuxc@53fa8000 { + iomuxc: iomuxc@53fa8000 { compatible = "fsl,imx53-iomuxc"; reg = <0x53fa8000 0x4000>; @@ -479,7 +479,7 @@ #interrupt-cells = <2>; }; - i2c@53fec000 { /* I2C3 */ + i2c3: i2c@53fec000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; @@ -510,7 +510,7 @@ status = "disabled"; }; - ecspi@63fac000 { /* ECSPI2 */ + ecspi2: ecspi@63fac000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; @@ -519,14 +519,14 @@ status = "disabled"; }; - sdma@63fb0000 { + sdma: sdma@63fb0000 { compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; reg = <0x63fb0000 0x4000>; interrupts = <6>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; }; - cspi@63fc0000 { + cspi: cspi@63fc0000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; @@ -535,7 +535,7 @@ status = "disabled"; }; - i2c@63fc4000 { /* I2C2 */ + i2c2: i2c@63fc4000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; @@ -544,7 +544,7 @@ status = "disabled"; }; - i2c@63fc8000 { /* I2C1 */ + i2c1: i2c@63fc8000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; @@ -562,13 +562,13 @@ status = "disabled"; }; - audmux@63fd0000 { + audmux: audmux@63fd0000 { compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; reg = <0x63fd0000 0x4000>; status = "disabled"; }; - nand@63fdb000 { + nfc: nand@63fdb000 { compatible = "fsl,imx53-nand"; reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; interrupts = <8>; @@ -584,7 +584,7 @@ status = "disabled"; }; - ethernet@63fec000 { + fec: ethernet@63fec000 { compatible = "fsl,imx53-fec", "fsl,imx25-fec"; reg = <0x63fec000 0x4000>; interrupts = <87>; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 1565aea59ebb..6dfeaedef307 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -108,7 +108,7 @@ clocks = <&clks 106>; }; - gpmi-nand@00112000 { + nfc: gpmi-nand@00112000 { compatible = "fsl,imx6q-gpmi-nand"; #address-cells = <1>; #size-cells = <1>; @@ -152,12 +152,12 @@ reg = <0x02000000 0x40000>; ranges; - spdif@02004000 { + spdif: spdif@02004000 { reg = <0x02004000 0x4000>; interrupts = <0 52 0x04>; }; - ecspi@02008000 { /* eCSPI1 */ + ecspi1: ecspi@02008000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -168,7 +168,7 @@ status = "disabled"; }; - ecspi@0200c000 { /* eCSPI2 */ + ecspi2: ecspi@0200c000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -179,7 +179,7 @@ status = "disabled"; }; - ecspi@02010000 { /* eCSPI3 */ + ecspi3: ecspi@02010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -190,7 +190,7 @@ status = "disabled"; }; - ecspi@02014000 { /* eCSPI4 */ + ecspi4: ecspi@02014000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -201,7 +201,7 @@ status = "disabled"; }; - ecspi@02018000 { /* eCSPI5 */ + ecspi5: ecspi@02018000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -221,7 +221,7 @@ status = "disabled"; }; - esai@02024000 { + esai: esai@02024000 { reg = <0x02024000 0x4000>; interrupts = <0 51 0x04>; }; @@ -256,7 +256,7 @@ status = "disabled"; }; - asrc@02034000 { + asrc: asrc@02034000 { reg = <0x02034000 0x4000>; interrupts = <0 50 0x04>; }; @@ -266,7 +266,7 @@ }; }; - vpu@02040000 { + vpu: vpu@02040000 { reg = <0x02040000 0x3c000>; interrupts = <0 3 0x04 0 12 0x04>; }; @@ -275,37 +275,37 @@ reg = <0x0207c000 0x4000>; }; - pwm@02080000 { /* PWM1 */ + pwm1: pwm@02080000 { reg = <0x02080000 0x4000>; interrupts = <0 83 0x04>; }; - pwm@02084000 { /* PWM2 */ + pwm2: pwm@02084000 { reg = <0x02084000 0x4000>; interrupts = <0 84 0x04>; }; - pwm@02088000 { /* PWM3 */ + pwm3: pwm@02088000 { reg = <0x02088000 0x4000>; interrupts = <0 85 0x04>; }; - pwm@0208c000 { /* PWM4 */ + pwm4: pwm@0208c000 { reg = <0x0208c000 0x4000>; interrupts = <0 86 0x04>; }; - flexcan@02090000 { /* CAN1 */ + can1: flexcan@02090000 { reg = <0x02090000 0x4000>; interrupts = <0 110 0x04>; }; - flexcan@02094000 { /* CAN2 */ + can2: flexcan@02094000 { reg = <0x02094000 0x4000>; interrupts = <0 111 0x04>; }; - gpt@02098000 { + gpt: gpt@02098000 { compatible = "fsl,imx6q-gpt"; reg = <0x02098000 0x4000>; interrupts = <0 55 0x04>; @@ -381,19 +381,19 @@ #interrupt-cells = <2>; }; - kpp@020b8000 { + kpp: kpp@020b8000 { reg = <0x020b8000 0x4000>; interrupts = <0 82 0x04>; }; - wdog@020bc000 { /* WDOG1 */ + wdog1: wdog@020bc000 { compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020bc000 0x4000>; interrupts = <0 80 0x04>; clocks = <&clks 0>; }; - wdog@020c0000 { /* WDOG2 */ + wdog2: wdog@020c0000 { compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020c0000 0x4000>; interrupts = <0 81 0x04>; @@ -525,23 +525,23 @@ }; }; - epit@020d0000 { /* EPIT1 */ + epit1: epit@020d0000 { /* EPIT1 */ reg = <0x020d0000 0x4000>; interrupts = <0 56 0x04>; }; - epit@020d4000 { /* EPIT2 */ + epit2: epit@020d4000 { /* EPIT2 */ reg = <0x020d4000 0x4000>; interrupts = <0 57 0x04>; }; - src@020d8000 { + src: src@020d8000 { compatible = "fsl,imx6q-src"; reg = <0x020d8000 0x4000>; interrupts = <0 91 0x04 0 96 0x04>; }; - gpc@020dc000 { + gpc: gpc@020dc000 { compatible = "fsl,imx6q-gpc"; reg = <0x020dc000 0x4000>; interrupts = <0 89 0x04 0 90 0x04>; @@ -552,7 +552,7 @@ reg = <0x020e0000 0x38>; }; - iomuxc@020e0000 { + iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6q-iomuxc"; reg = <0x020e0000 0x4000>; @@ -764,17 +764,17 @@ }; }; - dcic@020e4000 { /* DCIC1 */ + dcic1: dcic@020e4000 { reg = <0x020e4000 0x4000>; interrupts = <0 124 0x04>; }; - dcic@020e8000 { /* DCIC2 */ + dcic2: dcic@020e8000 { reg = <0x020e8000 0x4000>; interrupts = <0 125 0x04>; }; - sdma@020ec000 { + sdma: sdma@020ec000 { compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; reg = <0x020ec000 0x4000>; interrupts = <0 2 0x04>; @@ -800,7 +800,7 @@ reg = <0x0217c000 0x4000>; }; - usb@02184000 { /* USB OTG */ + usbotg: usb@02184000 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; interrupts = <0 43 0x04>; @@ -810,7 +810,7 @@ status = "disabled"; }; - usb@02184200 { /* USB1 */ + usbh1: usb@02184200 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; interrupts = <0 40 0x04>; @@ -820,7 +820,7 @@ status = "disabled"; }; - usb@02184400 { /* USB2 */ + usbh2: usb@02184400 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; interrupts = <0 41 0x04>; @@ -829,7 +829,7 @@ status = "disabled"; }; - usb@02184600 { /* USB3 */ + usbh3: usb@02184600 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184600 0x200>; interrupts = <0 42 0x04>; @@ -838,14 +838,14 @@ status = "disabled"; }; - usbmisc: usbmisc@02184800 { + usbmisc: usbmisc: usbmisc@02184800 { #index-cells = <1>; compatible = "fsl,imx6q-usbmisc"; reg = <0x02184800 0x200>; clocks = <&clks 162>; }; - ethernet@02188000 { + fec: ethernet@02188000 { compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; @@ -859,7 +859,7 @@ interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; }; - usdhc@02190000 { /* uSDHC1 */ + usdhc1: usdhc@02190000 { compatible = "fsl,imx6q-usdhc"; reg = <0x02190000 0x4000>; interrupts = <0 22 0x04>; @@ -869,7 +869,7 @@ status = "disabled"; }; - usdhc@02194000 { /* uSDHC2 */ + usdhc2: usdhc@02194000 { compatible = "fsl,imx6q-usdhc"; reg = <0x02194000 0x4000>; interrupts = <0 23 0x04>; @@ -879,7 +879,7 @@ status = "disabled"; }; - usdhc@02198000 { /* uSDHC3 */ + usdhc3: usdhc@02198000 { compatible = "fsl,imx6q-usdhc"; reg = <0x02198000 0x4000>; interrupts = <0 24 0x04>; @@ -889,7 +889,7 @@ status = "disabled"; }; - usdhc@0219c000 { /* uSDHC4 */ + usdhc4: usdhc@0219c000 { compatible = "fsl,imx6q-usdhc"; reg = <0x0219c000 0x4000>; interrupts = <0 25 0x04>; @@ -899,7 +899,7 @@ status = "disabled"; }; - i2c@021a0000 { /* I2C1 */ + i2c1: i2c@021a0000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; @@ -909,7 +909,7 @@ status = "disabled"; }; - i2c@021a4000 { /* I2C2 */ + i2c2: i2c@021a4000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; @@ -919,7 +919,7 @@ status = "disabled"; }; - i2c@021a8000 { /* I2C3 */ + i2c3: i2c@021a8000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; @@ -933,12 +933,12 @@ reg = <0x021ac000 0x4000>; }; - mmdc@021b0000 { /* MMDC0 */ + mmdc0: mmdc@021b0000 { /* MMDC0 */ compatible = "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; }; - mmdc@021b4000 { /* MMDC1 */ + mmdc1: mmdc@021b4000 { /* MMDC1 */ reg = <0x021b4000 0x4000>; }; @@ -966,7 +966,7 @@ interrupts = <0 109 0x04>; }; - audmux@021d8000 { + audmux: audmux@021d8000 { compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; reg = <0x021d8000 0x4000>; status = "disabled"; From b29b3e6f6c5a71a48475ac5ea7015ff267d60af8 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 23 Oct 2012 19:00:39 +0800 Subject: [PATCH 11/12] ARM: imx6q: print silicon version on boot i.MX6Q has 3 revisions 1.0, 1.1 and 1.2. Print revision on boot. Signed-off-by: Drew Moseley [drew: add proper error checking for function imx6q_revision()] Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-imx6q.c | 35 ++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 978b6dd00de4..9511142d436c 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -38,6 +38,40 @@ #include "cpuidle.h" #include "hardware.h" +#define IMX6Q_ANALOG_DIGPROG 0x260 + +static int imx6q_revision(void) +{ + struct device_node *np; + void __iomem *base; + static u32 rev; + + if (!rev) { + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); + if (!np) + return IMX_CHIP_REVISION_UNKNOWN; + base = of_iomap(np, 0); + if (!base) { + of_node_put(np); + return IMX_CHIP_REVISION_UNKNOWN; + } + rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG); + iounmap(base); + of_node_put(np); + } + + switch (rev & 0xff) { + case 0: + return IMX_CHIP_REVISION_1_0; + case 1: + return IMX_CHIP_REVISION_1_1; + case 2: + return IMX_CHIP_REVISION_1_2; + default: + return IMX_CHIP_REVISION_UNKNOWN; + } +} + void imx6q_restart(char mode, const char *cmd) { struct device_node *np; @@ -192,6 +226,7 @@ static void __init imx6q_timer_init(void) { mx6q_clocks_init(); twd_local_timer_of_register(); + imx_print_silicon_rev("i.MX6Q", imx6q_revision()); } static struct sys_timer imx6q_timer = { From 96efb44e471250592ee865ce5b870bc6f860921f Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 23 Oct 2012 19:44:34 +0800 Subject: [PATCH 12/12] ARM: imx6q: select ARM and PL310 errata ARM core r2p10 and PL310 r3p2 are integrated on imx6q. Select corresponding errata. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 01bf72c56c01..0737269707e0 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -832,6 +832,11 @@ config SOC_IMX6Q select ARCH_HAS_CPUFREQ select ARCH_HAS_OPP select ARM_CPU_SUSPEND if PM + select ARM_ERRATA_743622 + select ARM_ERRATA_751472 + select ARM_ERRATA_754322 + select ARM_ERRATA_764369 if SMP + select ARM_ERRATA_775420 select ARM_GIC select COMMON_CLK select CPU_V7 @@ -843,6 +848,9 @@ config SOC_IMX6Q select MFD_SYSCON select PINCTRL select PINCTRL_IMX6Q + select PL310_ERRATA_588369 if CACHE_PL310 + select PL310_ERRATA_727915 if CACHE_PL310 + select PL310_ERRATA_769419 if CACHE_PL310 select PM_OPP if PM help