Merge branch 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32
* 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32: [AVR32] Define ARCH_KMALLOC_MINALIGN to L1_CACHE_BYTES [AVR32] STK1000: Set SPI_MODE_3 in the ltv350qv board info [AVR32] gpio_*_cansleep() fix [AVR32] ratelimit segfault reporting rate
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commit
e00eea42f2
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@ -42,6 +42,7 @@ static struct spi_board_info spi0_board_info[] __initdata = {
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.modalias = "ltv350qv",
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.max_speed_hz = 16000000,
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.chip_select = 1,
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.mode = SPI_MODE_3,
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},
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};
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@ -158,7 +158,7 @@ bad_area:
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up_read(&mm->mmap_sem);
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if (user_mode(regs)) {
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if (exception_trace)
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if (exception_trace && printk_ratelimit())
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printk("%s%s[%d]: segfault at %08lx pc %08lx "
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"sp %08lx ecr %lu\n",
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is_init(tsk) ? KERN_EMERG : KERN_INFO,
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@ -14,6 +14,8 @@ int gpio_direction_output(unsigned int gpio, int value);
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int gpio_get_value(unsigned int gpio);
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void gpio_set_value(unsigned int gpio, int value);
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#include <asm-generic/gpio.h> /* cansleep wrappers */
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static inline int gpio_to_irq(unsigned int gpio)
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{
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return gpio + GPIO_IRQ_BASE;
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@ -4,6 +4,15 @@
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#define L1_CACHE_SHIFT 5
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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/*
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* Memory returned by kmalloc() may be used for DMA, so we must make
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* sure that all such allocations are cache aligned. Otherwise,
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* unrelated code may cause parts of the buffer to be read into the
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* cache before the transfer is done, causing old data to be seen by
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* the CPU.
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*/
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#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
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#ifndef __ASSEMBLER__
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struct cache_info {
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unsigned int ways;
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