ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock
cpsw needs the clock to be running at 50MHz in kernel. Hence setting the default rate. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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@ -527,8 +527,11 @@
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#address-cells = <1>;
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#size-cells = <1>;
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ti,hwmods = "cpgmac0";
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clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
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clock-names = "fck", "cpts";
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clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
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<&dpll_clksel_mac_clk>;
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clock-names = "fck", "cpts", "50mclk";
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assigned-clocks = <&dpll_clksel_mac_clk>;
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assigned-clock-rates = <50000000>;
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status = "disabled";
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cpdma_channels = <8>;
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ale_entries = <1024>;
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