Revert workaround for buggy cpu detection because regressions

-----BEGIN PGP SIGNATURE-----
 
 iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmFa4Q4aHHRzYm9nZW5k
 QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHCjmg/+L7RkL4LI9zDHXc3J4VXA
 r+yggN/YC4OalfyfIUuNUJnI2meQidoxUOiL/5U1kV4wUN+5GMqkQOzTRNrmwJln
 NRLAHuo/oyXsLFcqnzLzyU2s1S6pxbO1P65yiGDPn/4nl/+i6k8cVq3VzrDzMqIW
 LhU2bQMisNU359z1jndmIlFEjdo3ECLarORlckA/HtImskCLchU7MW5MwC0CAKPK
 988sb/LmNVUJ5PxKr1EopBE89kxBF2Ziz4fz3mTt6IOgWJSafxo8l0mUfYdZVLbD
 RmhKwHh6lxdKP8RPRJQ3pD+PQYxAioKdk9bHE0A68Yh7rkgKrcp5SrXcQQC0it6u
 RZJBQ/QNUl2yeihtXMlWuWtpE+dKMlqhqxkCtk53czepDU2CnrrxLDiUTRb1IYFD
 cTtmNNN+Wa2sg/s1atK06/X6/vhkMAdaBp+ZlK+r4Q8NLWX+OG9mROMe+5Cy5/KY
 zPvIlvUXpSr0/GLFjiSgi9DfAWTm5o/HHIAPVmZPnXRs9WrH4WfMZEDd76vfSAKf
 9Z7X0ycRZI4fATOZEb0AllUPuOYuOzdCpGYfuVODSkRt1df047g4o3RBFYi/acAn
 aGGoOUUcEdq3NWvF4+14Upio64vmwNXy3c0O8RxleidgN80c1MFiCq0M6bWyzQnX
 j1EWEZmqnvb6vXJPLzywNLE=
 =C4kp
 -----END PGP SIGNATURE-----

Merge tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS fix from Thomas Bogendoerfer:
 "Revert workaround for buggy cpu detection because regressions"

* tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: Revert "add support for buggy MT7621S core detection"
This commit is contained in:
Linus Torvalds 2021-10-04 09:38:55 -07:00
commit df5c18838e
1 changed files with 1 additions and 22 deletions

View File

@ -10,8 +10,6 @@
#include <linux/io.h>
#include <linux/types.h>
#include <asm/mips-boards/launch.h>
extern unsigned long __cps_access_bad_size(void)
__compiletime_error("Bad size for CPS accessor");
@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
*/
static inline unsigned int mips_cps_numcores(unsigned int cluster)
{
unsigned int ncores;
if (!mips_cm_present())
return 0;
/* Add one before masking to handle 0xff indicating no cores */
ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
if (IS_ENABLED(CONFIG_SOC_MT7621)) {
struct cpulaunch *launch;
/*
* Ralink MT7621S SoC is single core, but the GCR_CONFIG method
* always reports 2 cores. Check the second core's LAUNCH_FREADY
* flag to detect if the second core is missing. This method
* only works before the core has been started.
*/
launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
launch += 2; /* MT7621 has 2 VPEs per core */
if (!(launch->flags & LAUNCH_FREADY))
ncores = 1;
}
return ncores;
return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
}
/**