Revert workaround for buggy cpu detection because regressions
-----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmFa4Q4aHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHCjmg/+L7RkL4LI9zDHXc3J4VXA r+yggN/YC4OalfyfIUuNUJnI2meQidoxUOiL/5U1kV4wUN+5GMqkQOzTRNrmwJln NRLAHuo/oyXsLFcqnzLzyU2s1S6pxbO1P65yiGDPn/4nl/+i6k8cVq3VzrDzMqIW LhU2bQMisNU359z1jndmIlFEjdo3ECLarORlckA/HtImskCLchU7MW5MwC0CAKPK 988sb/LmNVUJ5PxKr1EopBE89kxBF2Ziz4fz3mTt6IOgWJSafxo8l0mUfYdZVLbD RmhKwHh6lxdKP8RPRJQ3pD+PQYxAioKdk9bHE0A68Yh7rkgKrcp5SrXcQQC0it6u RZJBQ/QNUl2yeihtXMlWuWtpE+dKMlqhqxkCtk53czepDU2CnrrxLDiUTRb1IYFD cTtmNNN+Wa2sg/s1atK06/X6/vhkMAdaBp+ZlK+r4Q8NLWX+OG9mROMe+5Cy5/KY zPvIlvUXpSr0/GLFjiSgi9DfAWTm5o/HHIAPVmZPnXRs9WrH4WfMZEDd76vfSAKf 9Z7X0ycRZI4fATOZEb0AllUPuOYuOzdCpGYfuVODSkRt1df047g4o3RBFYi/acAn aGGoOUUcEdq3NWvF4+14Upio64vmwNXy3c0O8RxleidgN80c1MFiCq0M6bWyzQnX j1EWEZmqnvb6vXJPLzywNLE= =C4kp -----END PGP SIGNATURE----- Merge tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fix from Thomas Bogendoerfer: "Revert workaround for buggy cpu detection because regressions" * tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: Revert "add support for buggy MT7621S core detection"
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commit
df5c18838e
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@ -10,8 +10,6 @@
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#include <linux/io.h>
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#include <linux/types.h>
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#include <asm/mips-boards/launch.h>
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extern unsigned long __cps_access_bad_size(void)
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__compiletime_error("Bad size for CPS accessor");
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@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
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*/
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static inline unsigned int mips_cps_numcores(unsigned int cluster)
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{
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unsigned int ncores;
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if (!mips_cm_present())
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return 0;
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/* Add one before masking to handle 0xff indicating no cores */
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ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
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if (IS_ENABLED(CONFIG_SOC_MT7621)) {
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struct cpulaunch *launch;
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/*
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* Ralink MT7621S SoC is single core, but the GCR_CONFIG method
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* always reports 2 cores. Check the second core's LAUNCH_FREADY
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* flag to detect if the second core is missing. This method
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* only works before the core has been started.
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*/
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launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
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launch += 2; /* MT7621 has 2 VPEs per core */
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if (!(launch->flags & LAUNCH_FREADY))
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ncores = 1;
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}
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return ncores;
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return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
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}
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/**
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