mtd: rawnand: sunxi: Migrate to ->exec_op()
And get rif of all legacy hooks and unused fields. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
Boris Brezillon
Miquel Raynal
parent
f5f888719a
commit
df5057999f
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@ -183,7 +183,6 @@ struct sunxi_nand_hw_ecc {
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* @mtd: base MTD structure
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* @clk_rate: clk_rate required for this NAND chip
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* @timing_cfg TIMING_CFG register value for this NAND chip
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* @selected: current active CS
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* @nsels: number of CS lines required by the NAND chip
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* @sels: array of CS lines descriptions
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*/
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@ -193,11 +192,6 @@ struct sunxi_nand_chip {
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unsigned long clk_rate;
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u32 timing_cfg;
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u32 timing_ctl;
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int selected;
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int addr_cycles;
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u32 addr[2];
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int cmd_cycles;
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u8 cmd[2];
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int nsels;
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struct sunxi_nand_chip_sel sels[0];
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};
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@ -386,26 +380,7 @@ static void sunxi_nfc_dma_op_cleanup(struct sunxi_nfc *nfc,
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nfc->regs + NFC_REG_CTL);
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}
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static int sunxi_nfc_dev_ready(struct nand_chip *nand)
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{
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struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
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struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller);
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u32 mask;
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if (sunxi_nand->selected < 0)
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return 0;
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if (sunxi_nand->sels[sunxi_nand->selected].rb < 0) {
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dev_err(nfc->dev, "cannot check R/B NAND status!\n");
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return 0;
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}
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mask = NFC_RB_STATE(sunxi_nand->sels[sunxi_nand->selected].rb);
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return !!(readl(nfc->regs + NFC_REG_ST) & mask);
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}
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static void sunxi_nfc_select_chip(struct nand_chip *nand, int chip)
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static void sunxi_nfc_select_chip(struct nand_chip *nand, unsigned int cs)
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{
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struct mtd_info *mtd = nand_to_mtd(nand);
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struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
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@ -413,40 +388,27 @@ static void sunxi_nfc_select_chip(struct nand_chip *nand, int chip)
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struct sunxi_nand_chip_sel *sel;
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u32 ctl;
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if (chip > 0 && chip >= sunxi_nand->nsels)
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return;
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if (chip == sunxi_nand->selected)
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if (cs > 0 && cs >= sunxi_nand->nsels)
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return;
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ctl = readl(nfc->regs + NFC_REG_CTL) &
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~(NFC_PAGE_SHIFT_MSK | NFC_CE_SEL_MSK | NFC_RB_SEL_MSK | NFC_EN);
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if (chip >= 0) {
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sel = &sunxi_nand->sels[chip];
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sel = &sunxi_nand->sels[cs];
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ctl |= NFC_CE_SEL(sel->cs) | NFC_EN | NFC_PAGE_SHIFT(nand->page_shift);
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if (sel->rb >= 0)
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ctl |= NFC_RB_SEL(sel->rb);
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ctl |= NFC_CE_SEL(sel->cs) | NFC_EN |
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NFC_PAGE_SHIFT(nand->page_shift);
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if (sel->rb < 0) {
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nand->legacy.dev_ready = NULL;
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} else {
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nand->legacy.dev_ready = sunxi_nfc_dev_ready;
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ctl |= NFC_RB_SEL(sel->rb);
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}
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writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
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writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
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if (nfc->clk_rate != sunxi_nand->clk_rate) {
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clk_set_rate(nfc->mod_clk, sunxi_nand->clk_rate);
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nfc->clk_rate = sunxi_nand->clk_rate;
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}
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if (nfc->clk_rate != sunxi_nand->clk_rate) {
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clk_set_rate(nfc->mod_clk, sunxi_nand->clk_rate);
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nfc->clk_rate = sunxi_nand->clk_rate;
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}
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writel(sunxi_nand->timing_ctl, nfc->regs + NFC_REG_TIMING_CTL);
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writel(sunxi_nand->timing_cfg, nfc->regs + NFC_REG_TIMING_CFG);
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writel(ctl, nfc->regs + NFC_REG_CTL);
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sunxi_nand->selected = chip;
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}
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static void sunxi_nfc_read_buf(struct nand_chip *nand, uint8_t *buf, int len)
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@ -523,71 +485,6 @@ static void sunxi_nfc_write_buf(struct nand_chip *nand, const uint8_t *buf,
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}
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}
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static uint8_t sunxi_nfc_read_byte(struct nand_chip *nand)
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{
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uint8_t ret = 0;
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sunxi_nfc_read_buf(nand, &ret, 1);
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return ret;
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}
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static void sunxi_nfc_cmd_ctrl(struct nand_chip *nand, int dat,
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unsigned int ctrl)
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{
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struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
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struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller);
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int ret;
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if (dat == NAND_CMD_NONE && (ctrl & NAND_NCE) &&
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!(ctrl & (NAND_CLE | NAND_ALE))) {
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u32 cmd = 0;
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if (!sunxi_nand->addr_cycles && !sunxi_nand->cmd_cycles)
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return;
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if (sunxi_nand->cmd_cycles--)
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cmd |= NFC_SEND_CMD1 | sunxi_nand->cmd[0];
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if (sunxi_nand->cmd_cycles--) {
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cmd |= NFC_SEND_CMD2;
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writel(sunxi_nand->cmd[1],
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nfc->regs + NFC_REG_RCMD_SET);
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}
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sunxi_nand->cmd_cycles = 0;
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if (sunxi_nand->addr_cycles) {
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cmd |= NFC_SEND_ADR |
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NFC_ADR_NUM(sunxi_nand->addr_cycles);
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writel(sunxi_nand->addr[0],
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nfc->regs + NFC_REG_ADDR_LOW);
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}
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if (sunxi_nand->addr_cycles > 4)
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writel(sunxi_nand->addr[1],
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nfc->regs + NFC_REG_ADDR_HIGH);
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ret = sunxi_nfc_wait_cmd_fifo_empty(nfc);
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if (ret)
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return;
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writel(cmd, nfc->regs + NFC_REG_CMD);
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sunxi_nand->addr[0] = 0;
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sunxi_nand->addr[1] = 0;
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sunxi_nand->addr_cycles = 0;
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sunxi_nfc_wait_events(nfc, NFC_CMD_INT_FLAG, true, 0);
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}
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if (ctrl & NAND_CLE) {
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sunxi_nand->cmd[sunxi_nand->cmd_cycles++] = dat;
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} else if (ctrl & NAND_ALE) {
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sunxi_nand->addr[sunxi_nand->addr_cycles / 4] |=
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dat << ((sunxi_nand->addr_cycles % 4) * 8);
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sunxi_nand->addr_cycles++;
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}
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}
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/* These seed values have been extracted from Allwinner's BSP */
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static const u16 sunxi_nfc_randomizer_page_seeds[] = {
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0x2b75, 0x0bd0, 0x5ca3, 0x62d1, 0x1c93, 0x07e9, 0x2162, 0x3a72,
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@ -1174,6 +1071,8 @@ static int sunxi_nfc_hw_ecc_read_page(struct nand_chip *nand, uint8_t *buf,
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int ret, i, cur_off = 0;
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bool raw_mode = false;
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sunxi_nfc_select_chip(nand, nand->cur_cs);
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nand_read_page_op(nand, page, 0, NULL, 0);
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sunxi_nfc_hw_ecc_enable(nand);
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@ -1208,6 +1107,8 @@ static int sunxi_nfc_hw_ecc_read_page_dma(struct nand_chip *nand, u8 *buf,
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{
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int ret;
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sunxi_nfc_select_chip(nand, nand->cur_cs);
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nand_read_page_op(nand, page, 0, NULL, 0);
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ret = sunxi_nfc_hw_ecc_read_chunks_dma(nand, buf, oob_required, page,
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@ -1228,6 +1129,8 @@ static int sunxi_nfc_hw_ecc_read_subpage(struct nand_chip *nand,
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int ret, i, cur_off = 0;
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unsigned int max_bitflips = 0;
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sunxi_nfc_select_chip(nand, nand->cur_cs);
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nand_read_page_op(nand, page, 0, NULL, 0);
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sunxi_nfc_hw_ecc_enable(nand);
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@ -1260,6 +1163,8 @@ static int sunxi_nfc_hw_ecc_read_subpage_dma(struct nand_chip *nand,
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int nchunks = DIV_ROUND_UP(data_offs + readlen, nand->ecc.size);
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int ret;
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sunxi_nfc_select_chip(nand, nand->cur_cs);
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nand_read_page_op(nand, page, 0, NULL, 0);
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ret = sunxi_nfc_hw_ecc_read_chunks_dma(nand, buf, false, page, nchunks);
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@ -1279,6 +1184,8 @@ static int sunxi_nfc_hw_ecc_write_page(struct nand_chip *nand,
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struct nand_ecc_ctrl *ecc = &nand->ecc;
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int ret, i, cur_off = 0;
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sunxi_nfc_select_chip(nand, nand->cur_cs);
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nand_prog_page_begin_op(nand, page, 0, NULL, 0);
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sunxi_nfc_hw_ecc_enable(nand);
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@ -1314,6 +1221,8 @@ static int sunxi_nfc_hw_ecc_write_subpage(struct nand_chip *nand,
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struct nand_ecc_ctrl *ecc = &nand->ecc;
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int ret, i, cur_off = 0;
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sunxi_nfc_select_chip(nand, nand->cur_cs);
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nand_prog_page_begin_op(nand, page, 0, NULL, 0);
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sunxi_nfc_hw_ecc_enable(nand);
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@ -1347,6 +1256,8 @@ static int sunxi_nfc_hw_ecc_write_page_dma(struct nand_chip *nand,
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struct scatterlist sg;
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int ret, i;
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sunxi_nfc_select_chip(nand, nand->cur_cs);
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ret = sunxi_nfc_wait_cmd_fifo_empty(nfc);
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if (ret)
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return ret;
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@ -1820,9 +1731,159 @@ static int sunxi_nand_attach_chip(struct nand_chip *nand)
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return 0;
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}
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static int sunxi_nfc_exec_subop(struct nand_chip *nand,
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const struct nand_subop *subop)
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{
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struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
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u32 cmd = 0, extcmd = 0, cnt = 0, addrs[2] = { };
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unsigned int i, j, remaining, start;
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void *inbuf = NULL;
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int ret;
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for (i = 0; i < subop->ninstrs; i++) {
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const struct nand_op_instr *instr = &subop->instrs[i];
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switch (instr->type) {
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case NAND_OP_CMD_INSTR:
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if (cmd & NFC_SEND_CMD1) {
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if (WARN_ON(cmd & NFC_SEND_CMD2))
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return -EINVAL;
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cmd |= NFC_SEND_CMD2;
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extcmd |= instr->ctx.cmd.opcode;
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} else {
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cmd |= NFC_SEND_CMD1 |
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NFC_CMD(instr->ctx.cmd.opcode);
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}
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break;
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case NAND_OP_ADDR_INSTR:
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remaining = nand_subop_get_num_addr_cyc(subop, i);
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start = nand_subop_get_addr_start_off(subop, i);
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for (j = 0; j < 8 && j + start < remaining; j++) {
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u32 addr = instr->ctx.addr.addrs[j + start];
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addrs[j / 4] |= addr << (j % 4) * 8;
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}
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if (j)
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cmd |= NFC_SEND_ADR | NFC_ADR_NUM(j);
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break;
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case NAND_OP_DATA_IN_INSTR:
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case NAND_OP_DATA_OUT_INSTR:
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start = nand_subop_get_data_start_off(subop, i);
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remaining = nand_subop_get_data_len(subop, i);
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cnt = min_t(u32, remaining, NFC_SRAM_SIZE);
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cmd |= NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD;
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if (instr->type == NAND_OP_DATA_OUT_INSTR) {
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cmd |= NFC_ACCESS_DIR;
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memcpy_toio(nfc->regs + NFC_RAM0_BASE,
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instr->ctx.data.buf.out + start,
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cnt);
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} else {
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inbuf = instr->ctx.data.buf.in + start;
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}
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break;
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case NAND_OP_WAITRDY_INSTR:
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cmd |= NFC_WAIT_FLAG;
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break;
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}
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}
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ret = sunxi_nfc_wait_cmd_fifo_empty(nfc);
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if (ret)
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return ret;
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if (cmd & NFC_SEND_ADR) {
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writel(addrs[0], nfc->regs + NFC_REG_ADDR_LOW);
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writel(addrs[1], nfc->regs + NFC_REG_ADDR_HIGH);
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}
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if (cmd & NFC_SEND_CMD2)
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writel(extcmd,
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nfc->regs +
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(cmd & NFC_ACCESS_DIR ?
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NFC_REG_WCMD_SET : NFC_REG_RCMD_SET));
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if (cmd & NFC_DATA_TRANS)
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writel(cnt, nfc->regs + NFC_REG_CNT);
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writel(cmd, nfc->regs + NFC_REG_CMD);
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ret = sunxi_nfc_wait_events(nfc, NFC_CMD_INT_FLAG,
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!(cmd & NFC_WAIT_FLAG) && cnt < 64,
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0);
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if (ret)
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return ret;
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if (inbuf)
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memcpy_fromio(inbuf, nfc->regs + NFC_RAM0_BASE, cnt);
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return 0;
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}
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static int sunxi_nfc_soft_waitrdy(struct nand_chip *nand,
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const struct nand_subop *subop)
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{
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return nand_soft_waitrdy(nand,
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subop->instrs[0].ctx.waitrdy.timeout_ms);
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}
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static const struct nand_op_parser sunxi_nfc_op_parser = NAND_OP_PARSER(
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NAND_OP_PARSER_PATTERN(sunxi_nfc_exec_subop,
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NAND_OP_PARSER_PAT_CMD_ELEM(true),
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NAND_OP_PARSER_PAT_ADDR_ELEM(true, 8),
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NAND_OP_PARSER_PAT_CMD_ELEM(true),
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NAND_OP_PARSER_PAT_WAITRDY_ELEM(true),
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NAND_OP_PARSER_PAT_DATA_IN_ELEM(true, 1024)),
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NAND_OP_PARSER_PATTERN(sunxi_nfc_exec_subop,
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NAND_OP_PARSER_PAT_CMD_ELEM(true),
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NAND_OP_PARSER_PAT_ADDR_ELEM(true, 8),
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NAND_OP_PARSER_PAT_DATA_OUT_ELEM(true, 1024),
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NAND_OP_PARSER_PAT_CMD_ELEM(true),
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NAND_OP_PARSER_PAT_WAITRDY_ELEM(true)),
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);
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static const struct nand_op_parser sunxi_nfc_norb_op_parser = NAND_OP_PARSER(
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NAND_OP_PARSER_PATTERN(sunxi_nfc_exec_subop,
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NAND_OP_PARSER_PAT_CMD_ELEM(true),
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NAND_OP_PARSER_PAT_ADDR_ELEM(true, 8),
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NAND_OP_PARSER_PAT_CMD_ELEM(true),
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NAND_OP_PARSER_PAT_DATA_IN_ELEM(true, 1024)),
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NAND_OP_PARSER_PATTERN(sunxi_nfc_exec_subop,
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NAND_OP_PARSER_PAT_CMD_ELEM(true),
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NAND_OP_PARSER_PAT_ADDR_ELEM(true, 8),
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NAND_OP_PARSER_PAT_DATA_OUT_ELEM(true, 1024),
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NAND_OP_PARSER_PAT_CMD_ELEM(true)),
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NAND_OP_PARSER_PATTERN(sunxi_nfc_soft_waitrdy,
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NAND_OP_PARSER_PAT_WAITRDY_ELEM(false)),
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);
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static int sunxi_nfc_exec_op(struct nand_chip *nand,
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const struct nand_operation *op, bool check_only)
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{
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struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
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const struct nand_op_parser *parser;
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sunxi_nfc_select_chip(nand, op->cs);
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if (sunxi_nand->sels[op->cs].rb >= 0)
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parser = &sunxi_nfc_op_parser;
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else
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parser = &sunxi_nfc_norb_op_parser;
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return nand_op_parser_exec_op(nand, parser, op, check_only);
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}
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static const struct nand_controller_ops sunxi_nand_controller_ops = {
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.attach_chip = sunxi_nand_attach_chip,
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.setup_data_interface = sunxi_nfc_setup_data_interface,
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.exec_op = sunxi_nfc_exec_op,
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};
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static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
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@ -1853,7 +1914,6 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
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}
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sunxi_nand->nsels = nsels;
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sunxi_nand->selected = -1;
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for (i = 0; i < nsels; i++) {
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ret = of_property_read_u32_index(np, "reg", i, &tmp);
|
||||
|
|
@ -1886,7 +1946,6 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
|
|||
|
||||
nand = &sunxi_nand->nand;
|
||||
/* Default tR value specified in the ONFI spec (chapter 4.15.1) */
|
||||
nand->legacy.chip_delay = 200;
|
||||
nand->controller = &nfc->controller;
|
||||
nand->controller->ops = &sunxi_nand_controller_ops;
|
||||
|
||||
|
|
@ -1896,11 +1955,6 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
|
|||
*/
|
||||
nand->ecc.mode = NAND_ECC_HW;
|
||||
nand_set_flash_node(nand, np);
|
||||
nand->legacy.select_chip = sunxi_nfc_select_chip;
|
||||
nand->legacy.cmd_ctrl = sunxi_nfc_cmd_ctrl;
|
||||
nand->legacy.read_buf = sunxi_nfc_read_buf;
|
||||
nand->legacy.write_buf = sunxi_nfc_write_buf;
|
||||
nand->legacy.read_byte = sunxi_nfc_read_byte;
|
||||
|
||||
mtd = nand_to_mtd(nand);
|
||||
mtd->dev.parent = dev;
|
||||
|
|
|
|||
Loading…
Reference in New Issue