pinctrl: cherryview: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips: "not an immutable chip, please consider fixing it!" Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new helper functions and call the appropriate gpiolib functions. While at it, switch to use hwirq variable instead of pin for the sake of consistency. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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6d209b4294
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df38990dec
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@ -1242,12 +1242,12 @@ static void chv_gpio_irq_ack(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
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int pin = irqd_to_hwirq(d);
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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u32 intr_line;
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raw_spin_lock(&chv_lock);
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intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0);
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intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
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intr_line &= CHV_PADCTRL0_INTSEL_MASK;
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intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT;
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chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line));
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@ -1255,17 +1255,16 @@ static void chv_gpio_irq_ack(struct irq_data *d)
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raw_spin_unlock(&chv_lock);
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}
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static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
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static void chv_gpio_irq_mask_unmask(struct irq_data *d, irq_hw_number_t hwirq, bool mask)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
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int pin = irqd_to_hwirq(d);
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u32 value, intr_line;
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unsigned long flags;
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raw_spin_lock_irqsave(&chv_lock, flags);
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intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0);
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intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
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intr_line &= CHV_PADCTRL0_INTSEL_MASK;
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intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT;
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@ -1281,12 +1280,20 @@ static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
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static void chv_gpio_irq_mask(struct irq_data *d)
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{
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chv_gpio_irq_mask_unmask(d, true);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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chv_gpio_irq_mask_unmask(d, hwirq, true);
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gpiochip_disable_irq(gc, hwirq);
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}
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static void chv_gpio_irq_unmask(struct irq_data *d)
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{
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chv_gpio_irq_mask_unmask(d, false);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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gpiochip_enable_irq(gc, hwirq);
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chv_gpio_irq_mask_unmask(d, hwirq, false);
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}
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static unsigned chv_gpio_irq_startup(struct irq_data *d)
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@ -1306,17 +1313,17 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d)
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struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
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struct device *dev = pctrl->dev;
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struct intel_community_context *cctx = &pctrl->context.communities[0];
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unsigned int pin = irqd_to_hwirq(d);
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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irq_flow_handler_t handler;
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unsigned long flags;
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u32 intsel, value;
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raw_spin_lock_irqsave(&chv_lock, flags);
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intsel = chv_readl(pctrl, pin, CHV_PADCTRL0);
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intsel = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
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intsel &= CHV_PADCTRL0_INTSEL_MASK;
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intsel >>= CHV_PADCTRL0_INTSEL_SHIFT;
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value = chv_readl(pctrl, pin, CHV_PADCTRL1);
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value = chv_readl(pctrl, hwirq, CHV_PADCTRL1);
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if (value & CHV_PADCTRL1_INTWAKECFG_LEVEL)
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handler = handle_level_irq;
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else
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@ -1324,9 +1331,9 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d)
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if (cctx->intr_lines[intsel] == CHV_INVALID_HWIRQ) {
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irq_set_handler_locked(d, handler);
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dev_dbg(dev, "using interrupt line %u for IRQ_TYPE_NONE on pin %u\n",
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intsel, pin);
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cctx->intr_lines[intsel] = pin;
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dev_dbg(dev, "using interrupt line %u for IRQ_TYPE_NONE on pin %lu\n",
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intsel, hwirq);
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cctx->intr_lines[intsel] = hwirq;
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}
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raw_spin_unlock_irqrestore(&chv_lock, flags);
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}
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@ -1392,14 +1399,14 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
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unsigned int pin = irqd_to_hwirq(d);
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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unsigned long flags;
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u32 value;
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int ret;
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raw_spin_lock_irqsave(&chv_lock, flags);
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ret = chv_gpio_set_intr_line(pctrl, pin);
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ret = chv_gpio_set_intr_line(pctrl, hwirq);
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if (ret)
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goto out_unlock;
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@ -1416,8 +1423,8 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
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* 2. If the pin cfg is not locked in BIOS:
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* Driver programs the IntWakeCfg bits and save the mapping.
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*/
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if (!chv_pad_locked(pctrl, pin)) {
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value = chv_readl(pctrl, pin, CHV_PADCTRL1);
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if (!chv_pad_locked(pctrl, hwirq)) {
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value = chv_readl(pctrl, hwirq, CHV_PADCTRL1);
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value &= ~CHV_PADCTRL1_INTWAKECFG_MASK;
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value &= ~CHV_PADCTRL1_INVRXTX_MASK;
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@ -1434,7 +1441,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
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value |= CHV_PADCTRL1_INVRXTX_RXDATA;
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}
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chv_writel(pctrl, pin, CHV_PADCTRL1, value);
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chv_writel(pctrl, hwirq, CHV_PADCTRL1, value);
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}
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if (type & IRQ_TYPE_EDGE_BOTH)
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@ -1448,6 +1455,17 @@ out_unlock:
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return ret;
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}
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static const struct irq_chip chv_gpio_irq_chip = {
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.name = "chv-gpio",
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.irq_startup = chv_gpio_irq_startup,
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.irq_ack = chv_gpio_irq_ack,
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.irq_mask = chv_gpio_irq_mask,
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.irq_unmask = chv_gpio_irq_unmask,
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.irq_set_type = chv_gpio_irq_type,
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.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE,
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GPIOCHIP_IRQ_RESOURCE_HELPERS,
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};
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static void chv_gpio_irq_handler(struct irq_desc *desc)
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{
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struct gpio_chip *gc = irq_desc_get_handler_data(desc);
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@ -1611,15 +1629,8 @@ static int chv_gpio_probe(struct intel_pinctrl *pctrl, int irq)
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chip->base = -1;
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pctrl->irq = irq;
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pctrl->irqchip.name = "chv-gpio";
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pctrl->irqchip.irq_startup = chv_gpio_irq_startup;
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pctrl->irqchip.irq_ack = chv_gpio_irq_ack;
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pctrl->irqchip.irq_mask = chv_gpio_irq_mask;
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pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask;
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pctrl->irqchip.irq_set_type = chv_gpio_irq_type;
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pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE;
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chip->irq.chip = &pctrl->irqchip;
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gpio_irq_chip_set_chip(&chip->irq, &chv_gpio_irq_chip);
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chip->irq.init_hw = chv_gpio_irq_init_hw;
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chip->irq.parent_handler = chv_gpio_irq_handler;
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chip->irq.num_parents = 1;
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