[media] dt3155v4l: remove bogus single-frame capture in init_board
For some weird reason an attempt is made in init_board to capture a single frame. No clue why, and everything works fine without that code. I suspect this was test code that was never removed. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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deb2897824
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@ -29,8 +29,6 @@
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#define DT3155_DEVICE_ID 0x1223
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#define DT3155_BUF_SIZE (768 * 576)
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#ifdef CONFIG_DT3155_STREAMING
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#define DT3155_CAPTURE_METHOD V4L2_CAP_STREAMING
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#else
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@ -645,16 +643,14 @@ static const struct v4l2_ioctl_ops dt3155_ioctl_ops = {
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static int dt3155_init_board(struct dt3155_priv *pd)
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{
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struct pci_dev *pdev = pd->pdev;
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void *buf_cpu;
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dma_addr_t buf_dma;
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int i;
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u8 tmp;
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u8 tmp = 0;
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pci_set_master(pdev); /* dt3155 needs it */
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/* resetting the adapter */
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iowrite32(FLD_CRPT_ODD | FLD_CRPT_EVEN | FLD_DN_ODD | FLD_DN_EVEN,
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pd->regs + CSR1);
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iowrite32(ADDR_ERR_ODD | ADDR_ERR_EVEN | FLD_CRPT_ODD | FLD_CRPT_EVEN |
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FLD_DN_ODD | FLD_DN_EVEN, pd->regs + CSR1);
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mmiowb();
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msleep(20);
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@ -710,33 +706,10 @@ static int dt3155_init_board(struct dt3155_priv *pd)
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write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
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write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
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/* allocate memory, and initialize the DMA machine */
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buf_cpu = dma_alloc_coherent(&pdev->dev, DT3155_BUF_SIZE, &buf_dma,
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GFP_KERNEL);
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if (!buf_cpu)
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return -ENOMEM;
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iowrite32(buf_dma, pd->regs + EVEN_DMA_START);
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iowrite32(buf_dma, pd->regs + ODD_DMA_START);
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iowrite32(0, pd->regs + EVEN_DMA_STRIDE);
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iowrite32(0, pd->regs + ODD_DMA_STRIDE);
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/* disable all irqs, clear all irq flags */
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iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD,
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pd->regs + INT_CSR);
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/* Perform a pseudo even field acquire */
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iowrite32(FIFO_EN | SRST | CAP_CONT_ODD, pd->regs + CSR1);
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write_i2c_reg(pd->regs, CSR2, pd->csr2 | SYNC_SNTL);
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write_i2c_reg(pd->regs, CONFIG, pd->config);
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write_i2c_reg(pd->regs, EVEN_CSR, CSR_SNGL);
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write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | SYNC_SNTL);
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msleep(100);
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read_i2c_reg(pd->regs, CSR2, &tmp);
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write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
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write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
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write_i2c_reg(pd->regs, CSR2, pd->csr2);
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iowrite32(FIFO_EN | SRST | FLD_DN_EVEN | FLD_DN_ODD, pd->regs + CSR1);
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/* deallocate memory */
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dma_free_coherent(&pdev->dev, DT3155_BUF_SIZE, buf_cpu, buf_dma);
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if (tmp & BUSY_EVEN)
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return -EIO;
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return 0;
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}
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@ -74,7 +74,10 @@
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#define AD_NEG_REF 0x02
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/* CSR1 bit masks */
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#define RANGE_EN 0x00008000
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#define CRPT_DIS 0x00004000
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#define ADDR_ERR_ODD 0x00000800
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#define ADDR_ERR_EVEN 0x00000400
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#define FLD_CRPT_ODD 0x00000200
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#define FLD_CRPT_EVEN 0x00000100
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#define FIFO_EN 0x00000080
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