drm/i915/uc: Sanitize uC when GT is sanitized
The microcontrollers are part of GT so it makes logical sense to have them sanitized at the same time. This also fixed an issue with our status tracking where the FW load status is not reset around hibernation. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190723091404.6449-2-chris@chris-wilson.co.uk
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@ -239,7 +239,6 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
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}
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}
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spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
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spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
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intel_uc_sanitize(&i915->gt.uc);
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i915_gem_sanitize(i915);
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i915_gem_sanitize(i915);
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}
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}
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@ -118,6 +118,8 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
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GEM_TRACE("\n");
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GEM_TRACE("\n");
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intel_uc_sanitize(>->uc);
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if (!reset_engines(gt) && !force)
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if (!reset_engines(gt) && !force)
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return;
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return;
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