drm/i915/uc: Sanitize uC when GT is sanitized

The microcontrollers are part of GT so it makes logical sense to have
them sanitized at the same time. This also fixed an issue with our
status tracking where the FW load status is not reset around
hibernation.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190723091404.6449-2-chris@chris-wilson.co.uk
This commit is contained in:
Daniele Ceraolo Spurio 2019-07-23 10:14:04 +01:00 committed by Chris Wilson
parent 3fcba88188
commit de6a263400
2 changed files with 2 additions and 1 deletions

View File

@ -239,7 +239,6 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
}
spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
intel_uc_sanitize(&i915->gt.uc);
i915_gem_sanitize(i915);
}

View File

@ -118,6 +118,8 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
GEM_TRACE("\n");
intel_uc_sanitize(&gt->uc);
if (!reset_engines(gt) && !force)
return;