bpf, docs: Document the byte swapping instructions
Add a section to document the byte swapping instructions. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/20220131183638.3934982-2-hch@lst.de
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@ -82,9 +82,9 @@ BPF_ALU uses 32-bit wide operands while BPF_ALU64 uses 64-bit wide operands for
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otherwise identical operations.
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The code field encodes the operation as below:
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======== ===== ==========================
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======== ===== =================================================
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code value description
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======== ===== ==========================
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======== ===== =================================================
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BPF_ADD 0x00 dst += src
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BPF_SUB 0x10 dst -= src
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BPF_MUL 0x20 dst \*= src
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@ -98,8 +98,8 @@ The code field encodes the operation as below:
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BPF_XOR 0xa0 dst ^= src
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BPF_MOV 0xb0 dst = src
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BPF_ARSH 0xc0 sign extending shift right
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BPF_END 0xd0 endianness conversion
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======== ===== ==========================
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BPF_END 0xd0 byte swap operations (see separate section below)
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======== ===== =================================================
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BPF_ADD | BPF_X | BPF_ALU means::
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@ -118,6 +118,42 @@ BPF_XOR | BPF_K | BPF_ALU64 means::
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src_reg = src_reg ^ imm32
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Byte swap instructions
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----------------------
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The byte swap instructions use an instruction class of ``BFP_ALU`` and a 4-bit
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code field of ``BPF_END``.
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The byte swap instructions instructions operate on the destination register
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only and do not use a separate source register or immediate value.
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The 1-bit source operand field in the opcode is used to to select what byte
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order the operation convert from or to:
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========= ===== =================================================
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source value description
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========= ===== =================================================
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BPF_TO_LE 0x00 convert between host byte order and little endian
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BPF_TO_BE 0x08 convert between host byte order and big endian
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========= ===== =================================================
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The imm field encodes the width of the swap operations. The following widths
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are supported: 16, 32 and 64.
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Examples:
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``BPF_ALU | BPF_TO_LE | BPF_END`` with imm = 16 means::
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dst_reg = htole16(dst_reg)
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``BPF_ALU | BPF_TO_BE | BPF_END`` with imm = 64 means::
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dst_reg = htobe64(dst_reg)
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``BPF_FROM_LE`` and ``BPF_FROM_BE`` exist as aliases for ``BPF_TO_LE`` and
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``BPF_TO_LE`` respetively.
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Jump instructions
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-----------------
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