arm64: dts: marvell: armada-cp110: describe more PPv2 interrupts
This patch describes 3 additional interrupts per PPv2 port. Those interrupts will be used later in future versions of the Marvell PPv2 driver, and now the device tree description matches the hardware capabilities. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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@ -70,9 +70,14 @@
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<ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hif0", "hif1", "hif2",
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"hif3", "hif4", "link";
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"hif3", "hif4", "hif5", "hif6", "hif7",
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"hif8", "link";
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port-id = <0>;
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gop-port-id = <0>;
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status = "disabled";
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@ -84,9 +89,14 @@
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<ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hif0", "hif1", "hif2",
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"hif3", "hif4", "link";
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"hif3", "hif4", "hif5", "hif6", "hif7",
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"hif8", "link";
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port-id = <1>;
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gop-port-id = <2>;
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status = "disabled";
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@ -98,9 +108,14 @@
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<ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hif0", "hif1", "hif2",
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"hif3", "hif4", "link";
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"hif3", "hif4", "hif5", "hif6", "hif7",
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"hif8", "link";
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port-id = <2>;
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gop-port-id = <3>;
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status = "disabled";
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