Merge branch 'add-ethernet-driver-for-starfive-jh7110-soc'
Samin Guo says: ==================== Add Ethernet driver for StarFive JH7110 SoC This series adds ethernet support for the StarFive JH7110 RISC-V SoC, which includes a dwmac-5.20 MAC driver (from Synopsys DesignWare). This series has been tested and works fine on VisionFive-2 v1.2A and v1.3B SBC boards. For more information and support, you can visit RVspace wiki[1]. You can simply review or test the patches at the link [2]. This patchset should be applied after the patchset [3] [4]. [1]: https://wiki.rvspace.org/ [2]: https://github.com/saminGuo/linux/tree/vf2-6.3rc4-gmac-net-next [3]: https://patchwork.kernel.org/project/linux-riscv/cover/20230401111934.130844-1-hal.feng@starfivetech.com [4]: https://patchwork.kernel.org/project/linux-riscv/cover/20230315055813.94740-1-william.qiu@starfivetech.com ==================== Link: https://lore.kernel.org/r/20230417100251.11871-1-samin.guo@starfivetech.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Paolo Abeni
commit
dce46f1b0c
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@ -30,6 +30,7 @@ select:
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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@ -90,8 +91,10 @@ properties:
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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- starfive,jh7110-dwmac
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reg:
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minItems: 1
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@ -134,12 +137,16 @@ properties:
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- ptp_ref
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resets:
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maxItems: 1
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description:
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MAC Reset signal.
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minItems: 1
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items:
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- description: GMAC stmmaceth reset
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- description: AHB reset
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reset-names:
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const: stmmaceth
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minItems: 1
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items:
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- const: stmmaceth
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- const: ahb
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power-domains:
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maxItems: 1
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@ -579,6 +586,7 @@ allOf:
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- snps,dwmac-3.50a
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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- st,spear600-gmac
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@ -636,6 +644,7 @@ allOf:
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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- st,spear600-gmac
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@ -0,0 +1,144 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022 StarFive Technology Co., Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive JH7110 DWMAC glue layer
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maintainers:
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- Emil Renner Berthing <kernel@esmil.dk>
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- Samin Guo <samin.guo@starfivetech.com>
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select:
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properties:
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compatible:
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contains:
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enum:
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- starfive,jh7110-dwmac
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required:
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- compatible
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properties:
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compatible:
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items:
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- enum:
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- starfive,jh7110-dwmac
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- const: snps,dwmac-5.20
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reg:
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maxItems: 1
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clocks:
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items:
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- description: GMAC main clock
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- description: GMAC AHB clock
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- description: PTP clock
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- description: TX clock
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- description: GTX clock
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clock-names:
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items:
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- const: stmmaceth
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- const: pclk
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- const: ptp_ref
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- const: tx
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- const: gtx
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interrupts:
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minItems: 3
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maxItems: 3
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interrupt-names:
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minItems: 3
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maxItems: 3
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resets:
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items:
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- description: MAC Reset signal.
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- description: AHB Reset signal.
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reset-names:
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items:
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- const: stmmaceth
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- const: ahb
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starfive,tx-use-rgmii-clk:
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description:
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Tx clock is provided by external rgmii clock.
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type: boolean
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starfive,syscon:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to syscon that configures phy mode
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- description: Offset of phy mode selection
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- description: Shift of phy mode selection
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description:
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A phandle to syscon with two arguments that configure phy mode.
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The argument one is the offset of phy mode selection, the
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argument two is the shift of phy mode selection.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- interrupt-names
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- resets
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- reset-names
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allOf:
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- $ref: snps,dwmac.yaml#
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unevaluatedProperties: false
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examples:
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- |
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ethernet@16030000 {
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compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
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reg = <0x16030000 0x10000>;
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clocks = <&clk 3>, <&clk 2>, <&clk 109>,
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<&clk 6>, <&clk 111>;
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clock-names = "stmmaceth", "pclk", "ptp_ref",
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"tx", "gtx";
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resets = <&rst 1>, <&rst 2>;
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reset-names = "stmmaceth", "ahb";
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interrupts = <7>, <6>, <5>;
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interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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phy-mode = "rgmii-id";
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snps,multicast-filter-bins = <64>;
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snps,perfect-filter-entries = <8>;
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rx-fifo-depth = <2048>;
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tx-fifo-depth = <2048>;
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snps,fixed-burst;
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snps,no-pbl-x8;
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snps,tso;
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snps,force_thresh_dma_mode;
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snps,axi-config = <&stmmac_axi_setup>;
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snps,en-tx-lpi-clockgating;
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snps,txpbl = <16>;
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snps,rxpbl = <16>;
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starfive,syscon = <&aon_syscon 0xc 0x12>;
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phy-handle = <&phy0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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stmmac_axi_setup: stmmac-axi-config {
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snps,lpi_en;
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snps,wr_osr_lmt = <4>;
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snps,rd_osr_lmt = <4>;
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snps,blen = <256 128 64 32 0 0 0>;
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};
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};
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@ -19928,6 +19928,13 @@ M: Emil Renner Berthing <kernel@esmil.dk>
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S: Maintained
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F: arch/riscv/boot/dts/starfive/
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STARFIVE DWMAC GLUE LAYER
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M: Emil Renner Berthing <kernel@esmil.dk>
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M: Samin Guo <samin.guo@starfivetech.com>
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S: Maintained
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F: Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
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F: drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
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STARFIVE JH7100 CLOCK DRIVERS
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M: Emil Renner Berthing <kernel@esmil.dk>
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S: Maintained
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@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
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for the stmmac device driver. This driver is used for
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arria5 and cyclone5 FPGA SoCs.
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config DWMAC_STARFIVE
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tristate "StarFive dwmac support"
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depends on OF && (ARCH_STARFIVE || COMPILE_TEST)
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select MFD_SYSCON
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default m if ARCH_STARFIVE
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help
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Support for ethernet controllers on StarFive RISC-V SoCs
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This selects the StarFive platform specific glue layer support for
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the stmmac device driver. This driver is used for StarFive JH7110
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ethernet controller.
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config DWMAC_STI
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tristate "STi GMAC support"
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default ARCH_STI
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@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS) += dwmac-oxnas.o
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obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o
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obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
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obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
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obj-$(CONFIG_DWMAC_STARFIVE) += dwmac-starfive.o
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obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
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obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
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obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
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@ -0,0 +1,171 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* StarFive DWMAC platform driver
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*
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* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
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* Copyright (C) 2022 StarFive Technology Co., Ltd.
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*
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*/
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#include <linux/mfd/syscon.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include "stmmac_platform.h"
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#define STARFIVE_DWMAC_PHY_INFT_RGMII 0x1
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#define STARFIVE_DWMAC_PHY_INFT_RMII 0x4
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#define STARFIVE_DWMAC_PHY_INFT_FIELD 0x7U
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struct starfive_dwmac {
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struct device *dev;
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struct clk *clk_tx;
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};
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static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed)
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{
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struct starfive_dwmac *dwmac = priv;
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unsigned long rate;
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int err;
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rate = clk_get_rate(dwmac->clk_tx);
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switch (speed) {
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case SPEED_1000:
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rate = 125000000;
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break;
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case SPEED_100:
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rate = 25000000;
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break;
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case SPEED_10:
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rate = 2500000;
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break;
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default:
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dev_err(dwmac->dev, "invalid speed %u\n", speed);
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break;
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}
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err = clk_set_rate(dwmac->clk_tx, rate);
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if (err)
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dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
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}
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static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
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{
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struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
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struct regmap *regmap;
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unsigned int args[2];
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unsigned int mode;
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int err;
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switch (plat_dat->interface) {
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case PHY_INTERFACE_MODE_RMII:
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mode = STARFIVE_DWMAC_PHY_INFT_RMII;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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mode = STARFIVE_DWMAC_PHY_INFT_RGMII;
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break;
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default:
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dev_err(dwmac->dev, "unsupported interface %d\n",
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plat_dat->interface);
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return -EINVAL;
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}
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regmap = syscon_regmap_lookup_by_phandle_args(dwmac->dev->of_node,
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"starfive,syscon",
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2, args);
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if (IS_ERR(regmap))
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return dev_err_probe(dwmac->dev, PTR_ERR(regmap), "getting the regmap failed\n");
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/* args[0]:offset args[1]: shift */
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err = regmap_update_bits(regmap, args[0],
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STARFIVE_DWMAC_PHY_INFT_FIELD << args[1],
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mode << args[1]);
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if (err)
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return dev_err_probe(dwmac->dev, err, "error setting phy mode\n");
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return 0;
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}
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static int starfive_dwmac_probe(struct platform_device *pdev)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct stmmac_resources stmmac_res;
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struct starfive_dwmac *dwmac;
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struct clk *clk_gtx;
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int err;
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err = stmmac_get_platform_resources(pdev, &stmmac_res);
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if (err)
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return dev_err_probe(&pdev->dev, err,
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"failed to get resources\n");
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plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
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if (IS_ERR(plat_dat))
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return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat),
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"dt configuration failed\n");
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dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
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if (!dwmac)
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return -ENOMEM;
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dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
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if (IS_ERR(dwmac->clk_tx))
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return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
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"error getting tx clock\n");
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clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
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if (IS_ERR(clk_gtx))
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return dev_err_probe(&pdev->dev, PTR_ERR(clk_gtx),
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"error getting gtx clock\n");
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/* Generally, the rgmii_tx clock is provided by the internal clock,
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* which needs to match the corresponding clock frequency according
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* to different speeds. If the rgmii_tx clock is provided by the
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* external rgmii_rxin, there is no need to configure the clock
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* internally, because rgmii_rxin will be adaptively adjusted.
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*/
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if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
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plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
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dwmac->dev = &pdev->dev;
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plat_dat->bsp_priv = dwmac;
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plat_dat->dma_cfg->dche = true;
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err = starfive_dwmac_set_mode(plat_dat);
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if (err)
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return err;
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err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
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if (err) {
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stmmac_remove_config_dt(pdev, plat_dat);
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return err;
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}
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return 0;
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}
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static const struct of_device_id starfive_dwmac_match[] = {
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{ .compatible = "starfive,jh7110-dwmac" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
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static struct platform_driver starfive_dwmac_driver = {
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.probe = starfive_dwmac_probe,
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.remove = stmmac_pltfr_remove,
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.driver = {
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.name = "starfive-dwmac",
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.pm = &stmmac_pltfr_pm_ops,
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.of_match_table = starfive_dwmac_match,
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},
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};
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module_platform_driver(starfive_dwmac_driver);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("StarFive DWMAC platform driver");
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MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
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MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
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@ -519,7 +519,8 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
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if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
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of_device_is_compatible(np, "snps,dwmac-4.10a") ||
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of_device_is_compatible(np, "snps,dwmac-4.20a") ||
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of_device_is_compatible(np, "snps,dwmac-5.10a")) {
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of_device_is_compatible(np, "snps,dwmac-5.10a") ||
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of_device_is_compatible(np, "snps,dwmac-5.20")) {
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plat->has_gmac4 = 1;
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plat->has_gmac = 0;
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||||
plat->pmt = 1;
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||||
|
|
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|||
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