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Merge branch 'update-stmmac-fix_mac_speed' 

Shenwei Wang says:

====================
update stmmac fix_mac_speed
====================

Link: https://lore.kernel.org/r/20230807160716.259072-1-shenwei.wang@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2023-08-10 17:26:07 -07:00
parent 6a1ed1430d 4fa6c97615
commit dccb8eb2d3
14 changed files with 61 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
View File

@ -178,7 +178,7 @@ static void dwc_qos_remove(struct platform_device *pdev)
#define AUTO_CAL_STATUS 0x880c
#define AUTO_CAL_STATUS_ACTIVE BIT(31)
static void tegra_eqos_fix_speed(void *priv, unsigned int speed)
static void tegra_eqos_fix_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct tegra_eqos *eqos = priv;
unsigned long rate = 125000000;

45
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
View File

@ -31,6 +31,7 @@
#define GPR_ENET_QOS_RGMII_EN (0x1 << 21)
#define MX93_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 0)
#define MX93_GPR_ENET_QOS_INTF_MASK GENMASK(3, 1)
#define MX93_GPR_ENET_QOS_INTF_SEL_MII (0x0 << 1)
#define MX93_GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 1)
#define MX93_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1)
@ -39,6 +40,7 @@
#define DMA_BUS_MODE 0x00001000
#define DMA_BUS_MODE_SFT_RESET (0x1 << 0)
#define RMII_RESET_SPEED (0x3 << 14)
#define CTRL_SPEED_MASK GENMASK(15, 14)
struct imx_dwmac_ops {
u32 addr_width;
@ -47,6 +49,7 @@ struct imx_dwmac_ops {
int (*fix_soc_reset)(void *priv, void __iomem *ioaddr);
int (*set_intf_mode)(struct plat_stmmacenet_data *plat_dat);
void (*fix_mac_speed)(void *priv, unsigned int speed, unsigned int mode);
};
struct imx_priv_data {
@ -56,6 +59,7 @@ struct imx_priv_data {
struct regmap *intf_regmap;
u32 intf_reg_off;
bool rmii_refclk_ext;
void __iomem *base_addr;
const struct imx_dwmac_ops *ops;
struct plat_stmmacenet_data *plat_dat;
@ -178,7 +182,7 @@ static void imx_dwmac_exit(struct platform_device *pdev, void *priv)
/* nothing to do now */
}
static void imx_dwmac_fix_speed(void *priv, unsigned int speed)
static void imx_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct plat_stmmacenet_data *plat_dat;
struct imx_priv_data *dwmac = priv;
@ -212,6 +216,41 @@ static void imx_dwmac_fix_speed(void *priv, unsigned int speed)
dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
}
static void imx93_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct imx_priv_data *dwmac = priv;
unsigned int iface;
int ctrl, old_ctrl;
imx_dwmac_fix_speed(priv, speed, mode);
if (!dwmac || mode != MLO_AN_FIXED)
return;
if (regmap_read(dwmac->intf_regmap, dwmac->intf_reg_off, &iface))
return;
iface &= MX93_GPR_ENET_QOS_INTF_MASK;
if (iface != MX93_GPR_ENET_QOS_INTF_SEL_RGMII)
return;
old_ctrl = readl(dwmac->base_addr + MAC_CTRL_REG);
ctrl = old_ctrl & ~CTRL_SPEED_MASK;
regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off,
MX93_GPR_ENET_QOS_INTF_MODE_MASK, 0);
writel(ctrl, dwmac->base_addr + MAC_CTRL_REG);
/* Ensure the settings for CTRL are applied. */
readl(dwmac->base_addr + MAC_CTRL_REG);
usleep_range(10, 20);
iface |= MX93_GPR_ENET_QOS_CLK_GEN_EN;
regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off,
MX93_GPR_ENET_QOS_INTF_MODE_MASK, iface);
writel(old_ctrl, dwmac->base_addr + MAC_CTRL_REG);
}
static int imx_dwmac_mx93_reset(void *priv, void __iomem *ioaddr)
{
struct plat_stmmacenet_data *plat_dat = priv;
@ -322,6 +361,7 @@ static int imx_dwmac_probe(struct platform_device *pdev)
plat_dat->fix_mac_speed = imx_dwmac_fix_speed;
plat_dat->bsp_priv = dwmac;
dwmac->plat_dat = plat_dat;
dwmac->base_addr = stmmac_res.addr;
ret = imx_dwmac_clks_config(dwmac, true);
if (ret)
@ -331,6 +371,8 @@ static int imx_dwmac_probe(struct platform_device *pdev)
if (ret)
goto err_dwmac_init;
if (dwmac->ops->fix_mac_speed)
plat_dat->fix_mac_speed = dwmac->ops->fix_mac_speed;
dwmac->plat_dat->fix_soc_reset = dwmac->ops->fix_soc_reset;
ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
@ -368,6 +410,7 @@ static struct imx_dwmac_ops imx93_dwmac_data = {
.mac_rgmii_txclk_auto_adj = true,
.set_intf_mode = imx93_set_intf_mode,
.fix_soc_reset = imx_dwmac_mx93_reset,
.fix_mac_speed = imx93_dwmac_fix_speed,
};
static const struct of_device_id imx_dwmac_match[] = {

4
drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c
View File

@ -22,13 +22,13 @@ struct intel_dwmac {
};
struct intel_dwmac_data {
void (*fix_mac_speed)(void *priv, unsigned int speed);
void (*fix_mac_speed)(void *priv, unsigned int speed, unsigned int mode);
unsigned long ptp_ref_clk_rate;
unsigned long tx_clk_rate;
bool tx_clk_en;
};
static void kmb_eth_fix_mac_speed(void *priv, unsigned int speed)
static void kmb_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct intel_dwmac *dwmac = priv;
unsigned long rate;

2
drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
View File

@ -257,7 +257,7 @@ static int ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac)
return PTR_ERR_OR_ZERO(gmac->qsgmii_csr);
}
static void ipq806x_gmac_fix_mac_speed(void *priv, unsigned int speed)
static void ipq806x_gmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct ipq806x_gmac *gmac = priv;

2
drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c
View File

@ -22,7 +22,7 @@ struct meson_dwmac {
void __iomem *reg;
};
static void meson6_dwmac_fix_mac_speed(void *priv, unsigned int speed)
static void meson6_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct meson_dwmac *dwmac = priv;
unsigned int val;

2
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
View File

@ -630,7 +630,7 @@ static int ethqos_configure(struct qcom_ethqos *ethqos)
return ethqos->configure_func(ethqos);
}
static void ethqos_fix_mac_speed(void *priv, unsigned int speed)
static void ethqos_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct qcom_ethqos *ethqos = priv;

2
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
View File

@ -1785,7 +1785,7 @@ static void rk_gmac_powerdown(struct rk_priv_data *gmac)
gmac_clk_enable(gmac, false);
}
static void rk_fix_speed(void *priv, unsigned int speed)
static void rk_fix_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct rk_priv_data *bsp_priv = priv;
struct device *dev = &bsp_priv->pdev->dev;

2
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
View File

@ -61,7 +61,7 @@ struct socfpga_dwmac {
struct mdio_device *pcs_mdiodev;
};
static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed)
static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
void __iomem *splitter_base = dwmac->splitter_base;

2
drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
View File

@ -24,7 +24,7 @@ struct starfive_dwmac {
struct clk *clk_tx;
};
static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed)
static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct starfive_dwmac *dwmac = priv;
unsigned long rate;

8
drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c
View File

@ -103,11 +103,11 @@ struct sti_dwmac {
struct regmap *regmap;
bool gmac_en;
u32 speed;
void (*fix_retime_src)(void *priv, unsigned int speed);
void (*fix_retime_src)(void *priv, unsigned int speed, unsigned int mode);
};
struct sti_dwmac_of_data {
void (*fix_retime_src)(void *priv, unsigned int speed);
void (*fix_retime_src)(void *priv, unsigned int speed, unsigned int mode);
};
static u32 phy_intf_sels[] = {
@ -135,7 +135,7 @@ static u32 stih4xx_tx_retime_val[] = {
| STIH4XX_ETH_SEL_INTERNAL_NOTEXT_PHYCLK,
};
static void stih4xx_fix_retime_src(void *priv, u32 spd)
static void stih4xx_fix_retime_src(void *priv, u32 spd, unsigned int mode)
{
struct sti_dwmac *dwmac = priv;
u32 src = dwmac->tx_retime_src;
@ -187,7 +187,7 @@ static int sti_dwmac_set_mode(struct sti_dwmac *dwmac)
val = (iface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;
regmap_update_bits(regmap, reg, ENMII_MASK, val);
dwmac->fix_retime_src(dwmac, dwmac->speed);
dwmac->fix_retime_src(dwmac, dwmac->speed, 0);
return 0;
}

2
drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
View File

@ -72,7 +72,7 @@ static void sun7i_gmac_exit(struct platform_device *pdev, void *priv)
regulator_disable(gmac->regulator);
}
static void sun7i_fix_speed(void *priv, unsigned int speed)
static void sun7i_fix_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct sunxi_priv_data *gmac = priv;

2
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
View File

@ -54,7 +54,7 @@ struct visconti_eth {
spinlock_t lock; /* lock to protect register update */
};
static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed)
static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{
struct visconti_eth *dwmac = priv;
struct net_device *netdev = dev_get_drvdata(dwmac->dev);

2
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@ -1064,7 +1064,7 @@ static void stmmac_mac_link_up(struct phylink_config *config,
priv->speed = speed;
if (priv->plat->fix_mac_speed)
priv->plat->fix_mac_speed(priv->plat->bsp_priv, speed);
priv->plat->fix_mac_speed(priv->plat->bsp_priv, speed, mode);
if (!duplex)
ctrl &= ~priv->hw->link.duplex;

2
include/linux/stmmac.h
View File

@ -256,7 +256,7 @@ struct plat_stmmacenet_data {
u8 tx_sched_algorithm;
struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];
struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES];
void (*fix_mac_speed)(void *priv, unsigned int speed);
void (*fix_mac_speed)(void *priv, unsigned int speed, unsigned int mode);
int (*fix_soc_reset)(void *priv, void __iomem *ioaddr);
int (*serdes_powerup)(struct net_device *ndev, void *priv);
void (*serdes_powerdown)(struct net_device *ndev, void *priv);