Merge branch 'arc_emac'
Beniamino Galvani says: ==================== net: arc_emac: fix tx issues the patches below solve some issues found in the tx ring reclaim strategy currently implemented in the arc_emac driver. Without these patches a simple outgoing UDP flow blocks almost immediately with the socket send buffer full, until some new rx packets trigger a clean of the tx ring. Everything seems to work fine on a Radxa Rock with this fix applied. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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dcbc0054d7
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@ -29,6 +29,17 @@
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#define DRV_NAME "arc_emac"
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#define DRV_VERSION "1.0"
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/**
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* arc_emac_tx_avail - Return the number of available slots in the tx ring.
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* @priv: Pointer to ARC EMAC private data structure.
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*
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* returns: the number of slots available for transmission in tx the ring.
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*/
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static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
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{
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return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
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}
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/**
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* arc_emac_adjust_link - Adjust the PHY link duplex.
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* @ndev: Pointer to the net_device structure.
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@ -180,10 +191,15 @@ static void arc_emac_tx_clean(struct net_device *ndev)
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txbd->info = 0;
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*txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
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if (netif_queue_stopped(ndev))
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netif_wake_queue(ndev);
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}
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/* Ensure that txbd_dirty is visible to tx() before checking
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* for queue stopped.
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*/
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smp_mb();
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if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
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netif_wake_queue(ndev);
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}
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/**
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@ -298,7 +314,7 @@ static int arc_emac_poll(struct napi_struct *napi, int budget)
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work_done = arc_emac_rx(ndev, budget);
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if (work_done < budget) {
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napi_complete(napi);
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arc_reg_or(priv, R_ENABLE, RXINT_MASK);
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arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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}
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return work_done;
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@ -327,9 +343,9 @@ static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
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/* Reset all flags except "MDIO complete" */
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arc_reg_set(priv, R_STATUS, status);
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if (status & RXINT_MASK) {
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if (status & (RXINT_MASK | TXINT_MASK)) {
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if (likely(napi_schedule_prep(&priv->napi))) {
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arc_reg_clr(priv, R_ENABLE, RXINT_MASK);
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arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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__napi_schedule(&priv->napi);
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}
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}
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@ -440,7 +456,7 @@ static int arc_emac_open(struct net_device *ndev)
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arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
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/* Enable interrupts */
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arc_reg_set(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
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arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
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/* Set CONTROL */
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arc_reg_set(priv, R_CTRL,
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@ -511,7 +527,7 @@ static int arc_emac_stop(struct net_device *ndev)
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netif_stop_queue(ndev);
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/* Disable interrupts */
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arc_reg_clr(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
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arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
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/* Disable EMAC */
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arc_reg_clr(priv, R_CTRL, EN_MASK);
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@ -574,11 +590,9 @@ static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
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len = max_t(unsigned int, ETH_ZLEN, skb->len);
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/* EMAC still holds this buffer in its possession.
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* CPU must not modify this buffer descriptor
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*/
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if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC)) {
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if (unlikely(!arc_emac_tx_avail(priv))) {
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netif_stop_queue(ndev);
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netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
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return NETDEV_TX_BUSY;
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}
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@ -607,12 +621,19 @@ static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
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/* Increment index to point to the next BD */
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*txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
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/* Get "info" of the next BD */
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info = &priv->txbd[*txbd_curr].info;
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/* Ensure that tx_clean() sees the new txbd_curr before
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* checking the queue status. This prevents an unneeded wake
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* of the queue in tx_clean().
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*/
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smp_mb();
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/* Check if if Tx BD ring is full - next BD is still owned by EMAC */
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if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC))
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if (!arc_emac_tx_avail(priv)) {
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netif_stop_queue(ndev);
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/* Refresh tx_dirty */
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smp_mb();
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if (arc_emac_tx_avail(priv))
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netif_start_queue(ndev);
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}
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arc_reg_set(priv, R_STATUS, TXPL_MASK);
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