drm/i915/display: split out dpt out of intel_display.c
Let's try to reduce the size of intel_display.c, not increase it. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/934a2a0db05e835f6843befef6082e2034f23b3a.1629721467.git.jani.nikula@intel.com
This commit is contained in:
Jani Nikula
parent
cb6baa20c5
commit
dc6d6158a6
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@ -212,6 +212,7 @@ i915-y += \
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display/intel_dpio_phy.o \
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display/intel_dpll.o \
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display/intel_dpll_mgr.o \
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display/intel_dpt.o \
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display/intel_dsb.o \
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display/intel_fb.o \
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display/intel_fbc.o \
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@ -84,6 +84,7 @@
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#include "intel_display_types.h"
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#include "intel_dmc.h"
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#include "intel_dp_link_training.h"
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#include "intel_dpt.h"
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#include "intel_fbc.h"
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#include "intel_fdi.h"
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#include "intel_fbdev.h"
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@ -127,182 +128,6 @@ static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
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static void intel_modeset_setup_hw_state(struct drm_device *dev,
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struct drm_modeset_acquire_ctx *ctx);
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struct i915_dpt {
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struct i915_address_space vm;
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struct drm_i915_gem_object *obj;
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struct i915_vma *vma;
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void __iomem *iomem;
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};
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#define i915_is_dpt(vm) ((vm)->is_dpt)
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static inline struct i915_dpt *
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i915_vm_to_dpt(struct i915_address_space *vm)
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{
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BUILD_BUG_ON(offsetof(struct i915_dpt, vm));
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GEM_BUG_ON(!i915_is_dpt(vm));
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return container_of(vm, struct i915_dpt, vm);
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}
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#define dpt_total_entries(dpt) ((dpt)->vm.total >> PAGE_SHIFT)
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static void gen8_set_pte(void __iomem *addr, gen8_pte_t pte)
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{
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writeq(pte, addr);
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}
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static void dpt_insert_page(struct i915_address_space *vm,
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dma_addr_t addr,
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u64 offset,
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enum i915_cache_level level,
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u32 flags)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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gen8_pte_t __iomem *base = dpt->iomem;
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gen8_set_pte(base + offset / I915_GTT_PAGE_SIZE,
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vm->pte_encode(addr, level, flags));
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}
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static void dpt_insert_entries(struct i915_address_space *vm,
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struct i915_vma *vma,
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enum i915_cache_level level,
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u32 flags)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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gen8_pte_t __iomem *base = dpt->iomem;
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const gen8_pte_t pte_encode = vm->pte_encode(0, level, flags);
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struct sgt_iter sgt_iter;
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dma_addr_t addr;
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int i;
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/*
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* Note that we ignore PTE_READ_ONLY here. The caller must be careful
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* not to allow the user to override access to a read only page.
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*/
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i = vma->node.start / I915_GTT_PAGE_SIZE;
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for_each_sgt_daddr(addr, sgt_iter, vma->pages)
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gen8_set_pte(&base[i++], pte_encode | addr);
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}
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static void dpt_clear_range(struct i915_address_space *vm,
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u64 start, u64 length)
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{
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}
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static void dpt_bind_vma(struct i915_address_space *vm,
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struct i915_vm_pt_stash *stash,
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struct i915_vma *vma,
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enum i915_cache_level cache_level,
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u32 flags)
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{
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struct drm_i915_gem_object *obj = vma->obj;
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u32 pte_flags;
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/* Applicable to VLV (gen8+ do not support RO in the GGTT) */
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pte_flags = 0;
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if (vma->vm->has_read_only && i915_gem_object_is_readonly(obj))
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pte_flags |= PTE_READ_ONLY;
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if (i915_gem_object_is_lmem(obj))
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pte_flags |= PTE_LM;
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vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags);
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vma->page_sizes.gtt = I915_GTT_PAGE_SIZE;
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/*
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* Without aliasing PPGTT there's no difference between
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* GLOBAL/LOCAL_BIND, it's all the same ptes. Hence unconditionally
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* upgrade to both bound if we bind either to avoid double-binding.
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*/
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atomic_or(I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND, &vma->flags);
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}
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static void dpt_unbind_vma(struct i915_address_space *vm, struct i915_vma *vma)
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{
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vm->clear_range(vm, vma->node.start, vma->size);
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}
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static void dpt_cleanup(struct i915_address_space *vm)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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i915_gem_object_put(dpt->obj);
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}
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static struct i915_address_space *
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intel_dpt_create(struct intel_framebuffer *fb)
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{
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struct drm_gem_object *obj = &intel_fb_obj(&fb->base)->base;
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struct drm_i915_private *i915 = to_i915(obj->dev);
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struct drm_i915_gem_object *dpt_obj;
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struct i915_address_space *vm;
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struct i915_dpt *dpt;
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size_t size;
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int ret;
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if (intel_fb_needs_pot_stride_remap(fb))
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size = intel_remapped_info_size(&fb->remapped_view.gtt.remapped);
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else
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size = DIV_ROUND_UP_ULL(obj->size, I915_GTT_PAGE_SIZE);
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size = round_up(size * sizeof(gen8_pte_t), I915_GTT_PAGE_SIZE);
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if (HAS_LMEM(i915))
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dpt_obj = i915_gem_object_create_lmem(i915, size, 0);
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else
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dpt_obj = i915_gem_object_create_stolen(i915, size);
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if (IS_ERR(dpt_obj))
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return ERR_CAST(dpt_obj);
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ret = i915_gem_object_set_cache_level(dpt_obj, I915_CACHE_NONE);
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if (ret) {
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i915_gem_object_put(dpt_obj);
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return ERR_PTR(ret);
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}
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dpt = kzalloc(sizeof(*dpt), GFP_KERNEL);
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if (!dpt) {
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i915_gem_object_put(dpt_obj);
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return ERR_PTR(-ENOMEM);
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}
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vm = &dpt->vm;
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vm->gt = &i915->gt;
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vm->i915 = i915;
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vm->dma = i915->drm.dev;
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vm->total = (size / sizeof(gen8_pte_t)) * I915_GTT_PAGE_SIZE;
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vm->is_dpt = true;
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i915_address_space_init(vm, VM_CLASS_DPT);
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vm->insert_page = dpt_insert_page;
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vm->clear_range = dpt_clear_range;
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vm->insert_entries = dpt_insert_entries;
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vm->cleanup = dpt_cleanup;
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vm->vma_ops.bind_vma = dpt_bind_vma;
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vm->vma_ops.unbind_vma = dpt_unbind_vma;
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vm->vma_ops.set_pages = ggtt_set_pages;
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vm->vma_ops.clear_pages = clear_pages;
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vm->pte_encode = gen8_ggtt_pte_encode;
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dpt->obj = dpt_obj;
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return &dpt->vm;
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}
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static void intel_dpt_destroy(struct i915_address_space *vm)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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i915_vm_close(&dpt->vm);
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}
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/* returns HPLL frequency in kHz */
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int vlv_get_hpll_vco(struct drm_i915_private *dev_priv)
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{
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@ -1880,49 +1705,6 @@ static void intel_plane_disable_noatomic(struct intel_crtc *crtc,
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intel_wait_for_vblank(dev_priv, crtc->pipe);
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}
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static struct i915_vma *intel_dpt_pin(struct i915_address_space *vm)
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{
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struct drm_i915_private *i915 = vm->i915;
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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intel_wakeref_t wakeref;
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struct i915_vma *vma;
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void __iomem *iomem;
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wakeref = intel_runtime_pm_get(&i915->runtime_pm);
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atomic_inc(&i915->gpu_error.pending_fb_pin);
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vma = i915_gem_object_ggtt_pin(dpt->obj, NULL, 0, 4096,
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HAS_LMEM(i915) ? 0 : PIN_MAPPABLE);
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if (IS_ERR(vma))
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goto err;
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iomem = i915_vma_pin_iomap(vma);
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i915_vma_unpin(vma);
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if (IS_ERR(iomem)) {
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vma = iomem;
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goto err;
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}
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dpt->vma = vma;
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dpt->iomem = iomem;
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i915_vma_get(vma);
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err:
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atomic_dec(&i915->gpu_error.pending_fb_pin);
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intel_runtime_pm_put(&i915->runtime_pm, wakeref);
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return vma;
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}
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static void intel_dpt_unpin(struct i915_address_space *vm)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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i915_vma_unpin_iomap(dpt->vma);
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i915_vma_put(dpt->vma);
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}
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static bool
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intel_reuse_initial_plane_obj(struct drm_i915_private *i915,
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const struct intel_initial_plane_config *plane_config,
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@ -0,0 +1,229 @@
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// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#include "i915_drv.h"
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#include "intel_display_types.h"
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#include "intel_dpt.h"
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#include "intel_fb.h"
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#include "gt/gen8_ppgtt.h"
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struct i915_dpt {
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struct i915_address_space vm;
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struct drm_i915_gem_object *obj;
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struct i915_vma *vma;
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void __iomem *iomem;
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};
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#define i915_is_dpt(vm) ((vm)->is_dpt)
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static inline struct i915_dpt *
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i915_vm_to_dpt(struct i915_address_space *vm)
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{
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BUILD_BUG_ON(offsetof(struct i915_dpt, vm));
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GEM_BUG_ON(!i915_is_dpt(vm));
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return container_of(vm, struct i915_dpt, vm);
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}
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#define dpt_total_entries(dpt) ((dpt)->vm.total >> PAGE_SHIFT)
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static void gen8_set_pte(void __iomem *addr, gen8_pte_t pte)
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{
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writeq(pte, addr);
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}
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static void dpt_insert_page(struct i915_address_space *vm,
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dma_addr_t addr,
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u64 offset,
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enum i915_cache_level level,
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u32 flags)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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gen8_pte_t __iomem *base = dpt->iomem;
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gen8_set_pte(base + offset / I915_GTT_PAGE_SIZE,
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vm->pte_encode(addr, level, flags));
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}
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static void dpt_insert_entries(struct i915_address_space *vm,
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struct i915_vma *vma,
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enum i915_cache_level level,
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u32 flags)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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gen8_pte_t __iomem *base = dpt->iomem;
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const gen8_pte_t pte_encode = vm->pte_encode(0, level, flags);
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struct sgt_iter sgt_iter;
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dma_addr_t addr;
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int i;
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/*
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* Note that we ignore PTE_READ_ONLY here. The caller must be careful
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* not to allow the user to override access to a read only page.
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*/
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i = vma->node.start / I915_GTT_PAGE_SIZE;
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for_each_sgt_daddr(addr, sgt_iter, vma->pages)
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gen8_set_pte(&base[i++], pte_encode | addr);
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}
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static void dpt_clear_range(struct i915_address_space *vm,
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u64 start, u64 length)
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{
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}
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static void dpt_bind_vma(struct i915_address_space *vm,
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struct i915_vm_pt_stash *stash,
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struct i915_vma *vma,
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enum i915_cache_level cache_level,
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u32 flags)
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{
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struct drm_i915_gem_object *obj = vma->obj;
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u32 pte_flags;
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/* Applicable to VLV (gen8+ do not support RO in the GGTT) */
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pte_flags = 0;
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if (vma->vm->has_read_only && i915_gem_object_is_readonly(obj))
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pte_flags |= PTE_READ_ONLY;
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if (i915_gem_object_is_lmem(obj))
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pte_flags |= PTE_LM;
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vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags);
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vma->page_sizes.gtt = I915_GTT_PAGE_SIZE;
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/*
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* Without aliasing PPGTT there's no difference between
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* GLOBAL/LOCAL_BIND, it's all the same ptes. Hence unconditionally
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* upgrade to both bound if we bind either to avoid double-binding.
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*/
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atomic_or(I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND, &vma->flags);
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}
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static void dpt_unbind_vma(struct i915_address_space *vm, struct i915_vma *vma)
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{
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vm->clear_range(vm, vma->node.start, vma->size);
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}
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static void dpt_cleanup(struct i915_address_space *vm)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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i915_gem_object_put(dpt->obj);
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}
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struct i915_vma *intel_dpt_pin(struct i915_address_space *vm)
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{
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struct drm_i915_private *i915 = vm->i915;
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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intel_wakeref_t wakeref;
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struct i915_vma *vma;
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void __iomem *iomem;
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wakeref = intel_runtime_pm_get(&i915->runtime_pm);
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atomic_inc(&i915->gpu_error.pending_fb_pin);
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vma = i915_gem_object_ggtt_pin(dpt->obj, NULL, 0, 4096,
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HAS_LMEM(i915) ? 0 : PIN_MAPPABLE);
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if (IS_ERR(vma))
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goto err;
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iomem = i915_vma_pin_iomap(vma);
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i915_vma_unpin(vma);
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if (IS_ERR(iomem)) {
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vma = iomem;
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goto err;
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}
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dpt->vma = vma;
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dpt->iomem = iomem;
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i915_vma_get(vma);
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err:
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atomic_dec(&i915->gpu_error.pending_fb_pin);
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intel_runtime_pm_put(&i915->runtime_pm, wakeref);
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return vma;
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}
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void intel_dpt_unpin(struct i915_address_space *vm)
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{
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struct i915_dpt *dpt = i915_vm_to_dpt(vm);
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i915_vma_unpin_iomap(dpt->vma);
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i915_vma_put(dpt->vma);
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}
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struct i915_address_space *
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intel_dpt_create(struct intel_framebuffer *fb)
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{
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struct drm_gem_object *obj = &intel_fb_obj(&fb->base)->base;
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struct drm_i915_private *i915 = to_i915(obj->dev);
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struct drm_i915_gem_object *dpt_obj;
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struct i915_address_space *vm;
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struct i915_dpt *dpt;
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size_t size;
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int ret;
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if (intel_fb_needs_pot_stride_remap(fb))
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size = intel_remapped_info_size(&fb->remapped_view.gtt.remapped);
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else
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size = DIV_ROUND_UP_ULL(obj->size, I915_GTT_PAGE_SIZE);
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size = round_up(size * sizeof(gen8_pte_t), I915_GTT_PAGE_SIZE);
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if (HAS_LMEM(i915))
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dpt_obj = i915_gem_object_create_lmem(i915, size, 0);
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else
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dpt_obj = i915_gem_object_create_stolen(i915, size);
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if (IS_ERR(dpt_obj))
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return ERR_CAST(dpt_obj);
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ret = i915_gem_object_set_cache_level(dpt_obj, I915_CACHE_NONE);
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if (ret) {
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i915_gem_object_put(dpt_obj);
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
|
||||
dpt = kzalloc(sizeof(*dpt), GFP_KERNEL);
|
||||
if (!dpt) {
|
||||
i915_gem_object_put(dpt_obj);
|
||||
return ERR_PTR(-ENOMEM);
|
||||
}
|
||||
|
||||
vm = &dpt->vm;
|
||||
|
||||
vm->gt = &i915->gt;
|
||||
vm->i915 = i915;
|
||||
vm->dma = i915->drm.dev;
|
||||
vm->total = (size / sizeof(gen8_pte_t)) * I915_GTT_PAGE_SIZE;
|
||||
vm->is_dpt = true;
|
||||
|
||||
i915_address_space_init(vm, VM_CLASS_DPT);
|
||||
|
||||
vm->insert_page = dpt_insert_page;
|
||||
vm->clear_range = dpt_clear_range;
|
||||
vm->insert_entries = dpt_insert_entries;
|
||||
vm->cleanup = dpt_cleanup;
|
||||
|
||||
vm->vma_ops.bind_vma = dpt_bind_vma;
|
||||
vm->vma_ops.unbind_vma = dpt_unbind_vma;
|
||||
vm->vma_ops.set_pages = ggtt_set_pages;
|
||||
vm->vma_ops.clear_pages = clear_pages;
|
||||
|
||||
vm->pte_encode = gen8_ggtt_pte_encode;
|
||||
|
||||
dpt->obj = dpt_obj;
|
||||
|
||||
return &dpt->vm;
|
||||
}
|
||||
|
||||
void intel_dpt_destroy(struct i915_address_space *vm)
|
||||
{
|
||||
struct i915_dpt *dpt = i915_vm_to_dpt(vm);
|
||||
|
||||
i915_vm_close(&dpt->vm);
|
||||
}
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
/* SPDX-License-Identifier: MIT */
|
||||
/*
|
||||
* Copyright © 2021 Intel Corporation
|
||||
*/
|
||||
|
||||
#ifndef __INTEL_DPT_H__
|
||||
#define __INTEL_DPT_H__
|
||||
|
||||
struct i915_address_space;
|
||||
struct i915_vma;
|
||||
struct intel_framebuffer;
|
||||
|
||||
void intel_dpt_destroy(struct i915_address_space *vm);
|
||||
struct i915_vma *intel_dpt_pin(struct i915_address_space *vm);
|
||||
void intel_dpt_unpin(struct i915_address_space *vm);
|
||||
struct i915_address_space *
|
||||
intel_dpt_create(struct intel_framebuffer *fb);
|
||||
|
||||
#endif /* __INTEL_DPT_H__ */
|
||||
Loading…
Reference in New Issue