[PATCH] orinoco: further comment cleanup in the PCI drivers
Signed-off-by: Pavel Roskin <proski@gnu.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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@ -3,7 +3,6 @@
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* Driver for Prism II devices which would usually be driven by orinoco_cs,
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* Driver for Prism II devices which would usually be driven by orinoco_cs,
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* but are connected to the PCI bus by a PCI-to-PCMCIA adapter used in
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* but are connected to the PCI bus by a PCI-to-PCMCIA adapter used in
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* Nortel emobility, Symbol LA-4113 and Symbol LA-4123.
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* Nortel emobility, Symbol LA-4113 and Symbol LA-4123.
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* but are connected to the PCI bus by a Nortel PCI-PCMCIA-Adapter.
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*
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*
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* Copyright (C) 2002 Tobias Hoffmann
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* Copyright (C) 2002 Tobias Hoffmann
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* (C) 2003 Christoph Jungegger <disdos@traum404.de>
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* (C) 2003 Christoph Jungegger <disdos@traum404.de>
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@ -57,7 +56,7 @@
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/*
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/*
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* Do a soft reset of the PCI card using the Configuration Option Register
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* Do a soft reset of the card using the Configuration Option Register
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* We need this to get going...
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* We need this to get going...
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* This is the part of the code that is strongly inspired from wlan-ng
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* This is the part of the code that is strongly inspired from wlan-ng
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*
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*
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@ -68,7 +67,7 @@ static int orinoco_nortel_cor_reset(struct orinoco_private *priv)
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{
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{
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struct orinoco_pci_card *card = priv->card;
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struct orinoco_pci_card *card = priv->card;
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/* Assert the reset until the card notice */
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/* Assert the reset until the card notices */
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iowrite16(8, card->bridge_io + 2);
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iowrite16(8, card->bridge_io + 2);
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ioread16(card->attr_io + COR_OFFSET);
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ioread16(card->attr_io + COR_OFFSET);
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iowrite16(0x80, card->attr_io + COR_OFFSET);
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iowrite16(0x80, card->attr_io + COR_OFFSET);
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@ -126,7 +125,7 @@ static int orinoco_nortel_hw_init(struct orinoco_pci_card *card)
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return -EBUSY;
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return -EBUSY;
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}
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}
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/* Set the PCMCIA COR-Register */
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/* Set the PCMCIA COR register */
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iowrite16(COR_VALUE, card->attr_io + COR_OFFSET);
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iowrite16(COR_VALUE, card->attr_io + COR_OFFSET);
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mdelay(1);
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mdelay(1);
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reg = ioread16(card->attr_io + COR_OFFSET);
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reg = ioread16(card->attr_io + COR_OFFSET);
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@ -1,11 +1,11 @@
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/* orinoco_pci.c
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/* orinoco_pci.c
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*
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*
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* Driver for Prism II devices that have a direct PCI interface
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* Driver for Prism 2.5/3 devices that have a direct PCI interface
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* (i.e., not in a Pcmcia or PLX bridge)
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* (i.e. these are not PCMCIA cards in a PCMCIA-to-PCI bridge).
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* The card contains only one PCI region, which contains all the usual
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* hermes registers, as well as the COR register.
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*
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*
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* Specifically here we're talking about the Linksys WMP11
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* Current maintainers are:
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*
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* Current maintainers (as of 29 September 2003) are:
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* Pavel Roskin <proski AT gnu.org>
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* Pavel Roskin <proski AT gnu.org>
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* and David Gibson <hermes AT gibson.dropbear.id.au>
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* and David Gibson <hermes AT gibson.dropbear.id.au>
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*
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*
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@ -41,54 +41,6 @@
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* under either the MPL or the GPL.
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* under either the MPL or the GPL.
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*/
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*/
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/*
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* Theory of operation...
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* -------------------
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* Maybe you had a look in orinoco_plx. Well, this is totally different...
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*
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* The card contains only one PCI region, which contains all the usual
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* hermes registers.
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*
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* The driver will memory map this region in normal memory. Because
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* the hermes registers are mapped in normal memory and not in ISA I/O
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* post space, we can't use the usual inw/outw macros and we need to
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* use readw/writew.
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* This slight difference force us to compile our own version of
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* hermes.c with the register access macro changed. That's a bit
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* hackish but works fine.
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*
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* Note that the PCI region is pretty big (4K). That's much more than
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* the usual set of hermes register (0x0 -> 0x3E). I've got a strong
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* suspicion that the whole memory space of the adapter is in fact in
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* this region. Accessing directly the adapter memory instead of going
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* through the usual register would speed up significantely the
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* operations...
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*
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* Finally, the card looks like this :
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-----------------------
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Bus 0, device 14, function 0:
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Network controller: PCI device 1260:3873 (Harris Semiconductor) (rev 1).
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IRQ 11.
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Master Capable. Latency=248.
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Prefetchable 32 bit memory at 0xffbcc000 [0xffbccfff].
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-----------------------
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00:0e.0 Network controller: Harris Semiconductor: Unknown device 3873 (rev 01)
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Subsystem: Unknown device 1737:3874
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Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
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Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
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Latency: 248 set, cache line size 08
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Interrupt: pin A routed to IRQ 11
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Region 0: Memory at ffbcc000 (32-bit, prefetchable) [size=4K]
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Capabilities: [dc] Power Management version 2
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Flags: PMEClk- AuxPwr- DSI- D1+ D2+ PME+
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Status: D0 PME-Enable- DSel=0 DScale=0 PME-
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-----------------------
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*
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* That's all..
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*
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* Jean II
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*/
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#define DRIVER_NAME "orinoco_pci"
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#define DRIVER_NAME "orinoco_pci"
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#define PFX DRIVER_NAME ": "
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#define PFX DRIVER_NAME ": "
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@ -102,11 +54,12 @@
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#include "orinoco.h"
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#include "orinoco.h"
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#include "orinoco_pci.h"
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#include "orinoco_pci.h"
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/* All the magic there is from wlan-ng */
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/* Offset of the COR register of the PCI card */
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/* Magic offset of the reset register of the PCI card */
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#define HERMES_PCI_COR (0x26)
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#define HERMES_PCI_COR (0x26)
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/* Magic bitmask to reset the card */
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/* Bitmask to reset the card */
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#define HERMES_PCI_COR_MASK (0x0080)
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#define HERMES_PCI_COR_MASK (0x0080)
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/* Magic timeouts for doing the reset.
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/* Magic timeouts for doing the reset.
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* Those times are straight from wlan-ng, and it is claimed that they
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* Those times are straight from wlan-ng, and it is claimed that they
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* are necessary. Alan will kill me. Take your time and grab a coffee. */
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* are necessary. Alan will kill me. Take your time and grab a coffee. */
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@ -115,7 +68,7 @@
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#define HERMES_PCI_COR_BUSYT (500) /* ms */
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#define HERMES_PCI_COR_BUSYT (500) /* ms */
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/*
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/*
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* Do a soft reset of the PCI card using the Configuration Option Register
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* Do a soft reset of the card using the Configuration Option Register
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* We need this to get going...
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* We need this to get going...
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* This is the part of the code that is strongly inspired from wlan-ng
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* This is the part of the code that is strongly inspired from wlan-ng
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*
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*
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@ -133,7 +86,7 @@ static int orinoco_pci_cor_reset(struct orinoco_private *priv)
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unsigned long timeout;
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unsigned long timeout;
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u16 reg;
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u16 reg;
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/* Assert the reset until the card notice */
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/* Assert the reset until the card notices */
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hermes_write_regn(hw, PCI_COR, HERMES_PCI_COR_MASK);
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hermes_write_regn(hw, PCI_COR, HERMES_PCI_COR_MASK);
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mdelay(HERMES_PCI_COR_ONT);
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mdelay(HERMES_PCI_COR_ONT);
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* Driver for Prism II devices which would usually be driven by orinoco_cs,
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* Driver for Prism II devices which would usually be driven by orinoco_cs,
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* but are connected to the PCI bus by a PLX9052.
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* but are connected to the PCI bus by a PLX9052.
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*
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*
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* Current maintainers (as of 29 September 2003) are:
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* Current maintainers are:
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* Pavel Roskin <proski AT gnu.org>
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* Pavel Roskin <proski AT gnu.org>
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* and David Gibson <hermes AT gibson.dropbear.id.au>
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* and David Gibson <hermes AT gibson.dropbear.id.au>
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*
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*
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@ -30,38 +30,18 @@
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* other provisions required by the GPL. If you do not delete the
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* other provisions required by the GPL. If you do not delete the
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* provisions above, a recipient may use your version of this file
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* provisions above, a recipient may use your version of this file
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* under either the MPL or the GPL.
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* under either the MPL or the GPL.
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* Caution: this is experimental and probably buggy. For success and
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* failure reports for different cards and adaptors, see
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* orinoco_plx_id_table near the end of the file. If you have a
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* card we don't have the PCI id for, and looks like it should work,
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* drop me mail with the id and "it works"/"it doesn't work".
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*
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*
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* Note: if everything gets detected fine but it doesn't actually send
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* Here's the general details on how the PLX9052 adapter works:
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* or receive packets, your first port of call should probably be to
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* try newer firmware in the card. Especially if you're doing Ad-Hoc
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* modes.
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*
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* The actual driving is done by orinoco.c, this is just resource
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* allocation stuff. The explanation below is courtesy of Ryan Niemi
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* on the linux-wlan-ng list at
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* http://archives.neohapsis.com/archives/dev/linux-wlan/2001-q1/0026.html
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*
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* The PLX9052-based cards (WL11000 and several others) are a
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* different beast than the usual PCMCIA-based PRISM2 configuration
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* expected by wlan-ng. Here's the general details on how the WL11000
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* PCI adapter works:
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*
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*
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* - Two PCI I/O address spaces, one 0x80 long which contains the
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* - Two PCI I/O address spaces, one 0x80 long which contains the
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* PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA
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* PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA
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* slot I/O address space.
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* slot I/O address space.
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*
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*
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* - One PCI memory address space, mapped to the PCMCIA memory space
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* - One PCI memory address space, mapped to the PCMCIA attribute space
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* (containing the CIS).
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* (containing the CIS).
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*
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*
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* After identifying the I/O and memory space, you can read through
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* Using the later, you can read through the CIS data to make sure the
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* the memory space to confirm the CIS's device ID or manufacturer ID
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* card is compatible with the driver. Keep in mind that the PCMCIA
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* to make sure it's the expected card. qKeep in mind that the PCMCIA
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* spec specifies the CIS as the lower 8 bits of each word read from
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* spec specifies the CIS as the lower 8 bits of each word read from
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* the CIS, so to read the bytes of the CIS, read every other byte
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* the CIS, so to read the bytes of the CIS, read every other byte
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* (0,2,4,...). Passing that test, you need to enable the I/O address
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* (0,2,4,...). Passing that test, you need to enable the I/O address
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@ -71,7 +51,7 @@
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* within the PCI memory space. Write 0x41 to the COR register to
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* within the PCI memory space. Write 0x41 to the COR register to
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* enable I/O mode and to select level triggered interrupts. To
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* enable I/O mode and to select level triggered interrupts. To
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* confirm you actually succeeded, read the COR register back and make
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* confirm you actually succeeded, read the COR register back and make
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* sure it actually got set to 0x41, incase you have an unexpected
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* sure it actually got set to 0x41, in case you have an unexpected
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* card inserted.
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* card inserted.
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*
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*
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* Following that, you can treat the second PCI I/O address space (the
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* Following that, you can treat the second PCI I/O address space (the
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@ -101,16 +81,6 @@
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* that, I've hot-swapped a number of times during debugging and
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* that, I've hot-swapped a number of times during debugging and
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* driver development for various reasons (stuck WAIT# line after the
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* driver development for various reasons (stuck WAIT# line after the
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* radio card's firmware locks up).
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* radio card's firmware locks up).
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*
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* Hope this is enough info for someone to add PLX9052 support to the
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* wlan-ng card. In the case of the WL11000, the PCI ID's are
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* 0x1639/0x0200, with matching subsystem ID's. Other PLX9052-based
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* manufacturers other than Eumitcom (or on cards other than the
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* WL11000) may have different PCI ID's.
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*
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* If anyone needs any more specific info, let me know. I haven't had
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* time to implement support myself yet, and with the way things are
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* going, might not have time for a while..
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*/
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*/
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#define DRIVER_NAME "orinoco_plx"
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#define DRIVER_NAME "orinoco_plx"
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@ -26,25 +26,13 @@
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* other provisions required by the GPL. If you do not delete the
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* other provisions required by the GPL. If you do not delete the
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* provisions above, a recipient may use your version of this file
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* provisions above, a recipient may use your version of this file
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* under either the MPL or the GPL.
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* under either the MPL or the GPL.
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* Caution: this is experimental and probably buggy. For success and
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* failure reports for different cards and adaptors, see
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* orinoco_tmd_id_table near the end of the file. If you have a
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* card we don't have the PCI id for, and looks like it should work,
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* drop me mail with the id and "it works"/"it doesn't work".
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*
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* Note: if everything gets detected fine but it doesn't actually send
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* or receive packets, your first port of call should probably be to
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* try newer firmware in the card. Especially if you're doing Ad-Hoc
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* modes.
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*
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*
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* The actual driving is done by orinoco.c, this is just resource
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* The actual driving is done by orinoco.c, this is just resource
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* allocation stuff.
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* allocation stuff.
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*
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*
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* This driver is modeled after the orinoco_plx driver. The main
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* This driver is modeled after the orinoco_plx driver. The main
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* difference is that the TMD chip has only IO port ranges and no
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* difference is that the TMD chip has only IO port ranges and doesn't
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* memory space, i.e. no access to the CIS. Compared to the PLX chip,
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* provide access to the PCMCIA attribute space.
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* the io range functionalities are exchanged.
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*
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*
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* Pheecom sells cards with the TMD chip as "ASIC version"
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* Pheecom sells cards with the TMD chip as "ASIC version"
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*/
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*/
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