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[MIPS] SMTC: Fix secondary VPE interrupt mask initialization. 

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2007-08-01 19:42:37 +01:00
parent 99e480d81c
commit dc0366bf3c
1 changed files with 5 additions and 4 deletions
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9
arch/mips/mips-boards/malta/malta_smtc.c
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@ -42,10 +42,11 @@ void prom_init_secondary(void)
myvpe = read_c0_tcbind() & TCBIND_CURVPE;
if (myvpe != 0) {
/* Ideally, this should be done only once per VPE, but... */
clear_c0_status(STATUSF_IP2);
set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3
| STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6
| STATUSF_IP7);
clear_c0_status(ST0_IM);
set_c0_status((0x100 << cp0_compare_irq)
| (0x100 << MIPS_CPU_IPI_IRQ));
if (cp0_perfcount_irq >= 0)
set_c0_status(0x100 << cp0_perfcount_irq);
}
smtc_init_secondary();