bpf, ppc64: remove ld_abs/ld_ind
Since LD_ABS/LD_IND instructions are now removed from the core and reimplemented through a combination of inlined BPF instructions and a slow-path helper, we can get rid of the complexity from ppc64 JIT. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Acked-by: Alexei Starovoitov <ast@kernel.org> Tested-by: Sandipan Das <sandipan@linux.vnet.ibm.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
This commit is contained in:
parent
4db25cc988
commit
dbf44daf7c
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@ -3,7 +3,7 @@
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# Arch-specific network modules
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#
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ifeq ($(CONFIG_PPC64),y)
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obj-$(CONFIG_BPF_JIT) += bpf_jit_asm64.o bpf_jit_comp64.o
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obj-$(CONFIG_BPF_JIT) += bpf_jit_comp64.o
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else
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obj-$(CONFIG_BPF_JIT) += bpf_jit_asm.o bpf_jit_comp.o
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endif
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@ -20,7 +20,7 @@
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* with our redzone usage.
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*
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* [ prev sp ] <-------------
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* [ nv gpr save area ] 8*8 |
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* [ nv gpr save area ] 6*8 |
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* [ tail_call_cnt ] 8 |
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* [ local_tmp_var ] 8 |
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* fp (r31) --> [ ebpf stack space ] upto 512 |
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@ -28,8 +28,8 @@
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* sp (r1) ---> [ stack pointer ] --------------
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*/
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/* for gpr non volatile registers BPG_REG_6 to 10, plus skb cache registers */
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#define BPF_PPC_STACK_SAVE (8*8)
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/* for gpr non volatile registers BPG_REG_6 to 10 */
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#define BPF_PPC_STACK_SAVE (6*8)
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/* for bpf JIT code internal usage */
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#define BPF_PPC_STACK_LOCALS 16
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/* stack frame excluding BPF stack, ensure this is quadword aligned */
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@ -39,10 +39,8 @@
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#ifndef __ASSEMBLY__
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/* BPF register usage */
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#define SKB_HLEN_REG (MAX_BPF_JIT_REG + 0)
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#define SKB_DATA_REG (MAX_BPF_JIT_REG + 1)
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#define TMP_REG_1 (MAX_BPF_JIT_REG + 2)
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#define TMP_REG_2 (MAX_BPF_JIT_REG + 3)
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#define TMP_REG_1 (MAX_BPF_JIT_REG + 0)
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#define TMP_REG_2 (MAX_BPF_JIT_REG + 1)
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/* BPF to ppc register mappings */
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static const int b2p[] = {
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@ -63,40 +61,23 @@ static const int b2p[] = {
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[BPF_REG_FP] = 31,
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/* eBPF jit internal registers */
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[BPF_REG_AX] = 2,
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[SKB_HLEN_REG] = 25,
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[SKB_DATA_REG] = 26,
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[TMP_REG_1] = 9,
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[TMP_REG_2] = 10
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};
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/* PPC NVR range -- update this if we ever use NVRs below r24 */
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#define BPF_PPC_NVR_MIN 24
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/* Assembly helpers */
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#define DECLARE_LOAD_FUNC(func) u64 func(u64 r3, u64 r4); \
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u64 func##_negative_offset(u64 r3, u64 r4); \
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u64 func##_positive_offset(u64 r3, u64 r4);
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DECLARE_LOAD_FUNC(sk_load_word);
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DECLARE_LOAD_FUNC(sk_load_half);
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DECLARE_LOAD_FUNC(sk_load_byte);
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#define CHOOSE_LOAD_FUNC(imm, func) \
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(imm < 0 ? \
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(imm >= SKF_LL_OFF ? func##_negative_offset : func) : \
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func##_positive_offset)
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/* PPC NVR range -- update this if we ever use NVRs below r27 */
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#define BPF_PPC_NVR_MIN 27
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#define SEEN_FUNC 0x1000 /* might call external helpers */
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#define SEEN_STACK 0x2000 /* uses BPF stack */
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#define SEEN_SKB 0x4000 /* uses sk_buff */
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#define SEEN_TAILCALL 0x8000 /* uses tail calls */
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#define SEEN_TAILCALL 0x4000 /* uses tail calls */
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struct codegen_context {
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/*
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* This is used to track register usage as well
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* as calls to external helpers.
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* - register usage is tracked with corresponding
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* bits (r3-r10 and r25-r31)
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* bits (r3-r10 and r27-r31)
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* - rest of the bits can be used to track other
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* things -- for now, we use bits 16 to 23
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* encoded in SEEN_* macros above
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@ -1,180 +0,0 @@
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/*
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* bpf_jit_asm64.S: Packet/header access helper functions
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* for PPC64 BPF compiler.
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*
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* Copyright 2016, Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
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* IBM Corporation
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*
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* Based on bpf_jit_asm.S by Matt Evans
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#include <asm/ppc_asm.h>
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#include <asm/ptrace.h>
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#include "bpf_jit64.h"
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/*
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* All of these routines are called directly from generated code,
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* with the below register usage:
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* r27 skb pointer (ctx)
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* r25 skb header length
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* r26 skb->data pointer
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* r4 offset
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*
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* Result is passed back in:
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* r8 data read in host endian format (accumulator)
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*
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* r9 is used as a temporary register
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*/
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#define r_skb r27
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#define r_hlen r25
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#define r_data r26
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#define r_off r4
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#define r_val r8
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#define r_tmp r9
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_GLOBAL_TOC(sk_load_word)
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cmpdi r_off, 0
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blt bpf_slow_path_word_neg
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b sk_load_word_positive_offset
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_GLOBAL_TOC(sk_load_word_positive_offset)
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/* Are we accessing past headlen? */
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subi r_tmp, r_hlen, 4
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cmpd r_tmp, r_off
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blt bpf_slow_path_word
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/* Nope, just hitting the header. cr0 here is eq or gt! */
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LWZX_BE r_val, r_data, r_off
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blr /* Return success, cr0 != LT */
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_GLOBAL_TOC(sk_load_half)
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cmpdi r_off, 0
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blt bpf_slow_path_half_neg
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b sk_load_half_positive_offset
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_GLOBAL_TOC(sk_load_half_positive_offset)
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subi r_tmp, r_hlen, 2
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cmpd r_tmp, r_off
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blt bpf_slow_path_half
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LHZX_BE r_val, r_data, r_off
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blr
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_GLOBAL_TOC(sk_load_byte)
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cmpdi r_off, 0
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blt bpf_slow_path_byte_neg
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b sk_load_byte_positive_offset
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_GLOBAL_TOC(sk_load_byte_positive_offset)
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cmpd r_hlen, r_off
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ble bpf_slow_path_byte
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lbzx r_val, r_data, r_off
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blr
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/*
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* Call out to skb_copy_bits:
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* Allocate a new stack frame here to remain ABI-compliant in
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* stashing LR.
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*/
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#define bpf_slow_path_common(SIZE) \
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mflr r0; \
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std r0, PPC_LR_STKOFF(r1); \
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stdu r1, -(STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_LOCALS)(r1); \
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mr r3, r_skb; \
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/* r4 = r_off as passed */ \
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addi r5, r1, STACK_FRAME_MIN_SIZE; \
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li r6, SIZE; \
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bl skb_copy_bits; \
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nop; \
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/* save r5 */ \
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addi r5, r1, STACK_FRAME_MIN_SIZE; \
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/* r3 = 0 on success */ \
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addi r1, r1, STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_LOCALS; \
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ld r0, PPC_LR_STKOFF(r1); \
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mtlr r0; \
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cmpdi r3, 0; \
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blt bpf_error; /* cr0 = LT */
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bpf_slow_path_word:
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bpf_slow_path_common(4)
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/* Data value is on stack, and cr0 != LT */
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LWZX_BE r_val, 0, r5
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blr
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bpf_slow_path_half:
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bpf_slow_path_common(2)
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LHZX_BE r_val, 0, r5
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blr
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bpf_slow_path_byte:
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bpf_slow_path_common(1)
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lbzx r_val, 0, r5
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blr
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/*
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* Call out to bpf_internal_load_pointer_neg_helper
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*/
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#define sk_negative_common(SIZE) \
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mflr r0; \
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std r0, PPC_LR_STKOFF(r1); \
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stdu r1, -STACK_FRAME_MIN_SIZE(r1); \
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mr r3, r_skb; \
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/* r4 = r_off, as passed */ \
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li r5, SIZE; \
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bl bpf_internal_load_pointer_neg_helper; \
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nop; \
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addi r1, r1, STACK_FRAME_MIN_SIZE; \
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ld r0, PPC_LR_STKOFF(r1); \
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mtlr r0; \
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/* R3 != 0 on success */ \
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cmpldi r3, 0; \
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beq bpf_error_slow; /* cr0 = EQ */
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bpf_slow_path_word_neg:
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lis r_tmp, -32 /* SKF_LL_OFF */
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cmpd r_off, r_tmp /* addr < SKF_* */
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blt bpf_error /* cr0 = LT */
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b sk_load_word_negative_offset
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_GLOBAL_TOC(sk_load_word_negative_offset)
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sk_negative_common(4)
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LWZX_BE r_val, 0, r3
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blr
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bpf_slow_path_half_neg:
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lis r_tmp, -32 /* SKF_LL_OFF */
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cmpd r_off, r_tmp /* addr < SKF_* */
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blt bpf_error /* cr0 = LT */
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b sk_load_half_negative_offset
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_GLOBAL_TOC(sk_load_half_negative_offset)
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sk_negative_common(2)
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LHZX_BE r_val, 0, r3
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blr
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bpf_slow_path_byte_neg:
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lis r_tmp, -32 /* SKF_LL_OFF */
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cmpd r_off, r_tmp /* addr < SKF_* */
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blt bpf_error /* cr0 = LT */
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b sk_load_byte_negative_offset
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_GLOBAL_TOC(sk_load_byte_negative_offset)
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sk_negative_common(1)
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lbzx r_val, 0, r3
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blr
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bpf_error_slow:
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/* fabricate a cr0 = lt */
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li r_tmp, -1
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cmpdi r_tmp, 0
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bpf_error:
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/*
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* Entered with cr0 = lt
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* Generated code will 'blt epilogue', returning 0.
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*/
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li r_val, 0
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blr
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@ -59,7 +59,7 @@ static inline bool bpf_has_stack_frame(struct codegen_context *ctx)
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* [ prev sp ] <-------------
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* [ ... ] |
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* sp (r1) ---> [ stack pointer ] --------------
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* [ nv gpr save area ] 8*8
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* [ nv gpr save area ] 6*8
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* [ tail_call_cnt ] 8
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* [ local_tmp_var ] 8
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* [ unused red zone ] 208 bytes protected
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@ -88,21 +88,6 @@ static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)
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BUG();
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}
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static void bpf_jit_emit_skb_loads(u32 *image, struct codegen_context *ctx)
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{
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/*
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* Load skb->len and skb->data_len
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* r3 points to skb
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*/
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PPC_LWZ(b2p[SKB_HLEN_REG], 3, offsetof(struct sk_buff, len));
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PPC_LWZ(b2p[TMP_REG_1], 3, offsetof(struct sk_buff, data_len));
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/* header_len = len - data_len */
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PPC_SUB(b2p[SKB_HLEN_REG], b2p[SKB_HLEN_REG], b2p[TMP_REG_1]);
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/* skb->data pointer */
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PPC_BPF_LL(b2p[SKB_DATA_REG], 3, offsetof(struct sk_buff, data));
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}
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static void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
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{
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int i;
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@ -145,18 +130,6 @@ static void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
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if (bpf_is_seen_register(ctx, i))
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PPC_BPF_STL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
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/*
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* Save additional non-volatile regs if we cache skb
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* Also, setup skb data
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*/
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if (ctx->seen & SEEN_SKB) {
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PPC_BPF_STL(b2p[SKB_HLEN_REG], 1,
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bpf_jit_stack_offsetof(ctx, b2p[SKB_HLEN_REG]));
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PPC_BPF_STL(b2p[SKB_DATA_REG], 1,
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bpf_jit_stack_offsetof(ctx, b2p[SKB_DATA_REG]));
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bpf_jit_emit_skb_loads(image, ctx);
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}
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/* Setup frame pointer to point to the bpf stack area */
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if (bpf_is_seen_register(ctx, BPF_REG_FP))
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PPC_ADDI(b2p[BPF_REG_FP], 1,
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@ -172,14 +145,6 @@ static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx
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if (bpf_is_seen_register(ctx, i))
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PPC_BPF_LL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
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/* Restore non-volatile registers used for skb cache */
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if (ctx->seen & SEEN_SKB) {
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PPC_BPF_LL(b2p[SKB_HLEN_REG], 1,
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bpf_jit_stack_offsetof(ctx, b2p[SKB_HLEN_REG]));
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PPC_BPF_LL(b2p[SKB_DATA_REG], 1,
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bpf_jit_stack_offsetof(ctx, b2p[SKB_DATA_REG]));
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}
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/* Tear down our stack frame */
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if (bpf_has_stack_frame(ctx)) {
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PPC_ADDI(1, 1, BPF_PPC_STACKFRAME + ctx->stack_size);
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@ -753,23 +718,10 @@ emit_clear:
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ctx->seen |= SEEN_FUNC;
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func = (u8 *) __bpf_call_base + imm;
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/* Save skb pointer if we need to re-cache skb data */
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if ((ctx->seen & SEEN_SKB) &&
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bpf_helper_changes_pkt_data(func))
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PPC_BPF_STL(3, 1, bpf_jit_stack_local(ctx));
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bpf_jit_emit_func_call(image, ctx, (u64)func);
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/* move return value from r3 to BPF_REG_0 */
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PPC_MR(b2p[BPF_REG_0], 3);
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/* refresh skb cache */
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if ((ctx->seen & SEEN_SKB) &&
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bpf_helper_changes_pkt_data(func)) {
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/* reload skb pointer to r3 */
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PPC_BPF_LL(3, 1, bpf_jit_stack_local(ctx));
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bpf_jit_emit_skb_loads(image, ctx);
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}
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break;
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/*
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|
@ -886,65 +838,6 @@ cond_branch:
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PPC_BCC(true_cond, addrs[i + 1 + off]);
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break;
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/*
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* Loads from packet header/data
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* Assume 32-bit input value in imm and X (src_reg)
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*/
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/* Absolute loads */
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case BPF_LD | BPF_W | BPF_ABS:
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func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_word);
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goto common_load_abs;
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case BPF_LD | BPF_H | BPF_ABS:
|
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func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_half);
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goto common_load_abs;
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case BPF_LD | BPF_B | BPF_ABS:
|
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func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_byte);
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common_load_abs:
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/*
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* Load from [imm]
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* Load into r4, which can just be passed onto
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* skb load helpers as the second parameter
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*/
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PPC_LI32(4, imm);
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goto common_load;
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|
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/* Indirect loads */
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case BPF_LD | BPF_W | BPF_IND:
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func = (u8 *)sk_load_word;
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goto common_load_ind;
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case BPF_LD | BPF_H | BPF_IND:
|
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func = (u8 *)sk_load_half;
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goto common_load_ind;
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case BPF_LD | BPF_B | BPF_IND:
|
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func = (u8 *)sk_load_byte;
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common_load_ind:
|
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/*
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* Load from [src_reg + imm]
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* Treat src_reg as a 32-bit value
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*/
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PPC_EXTSW(4, src_reg);
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if (imm) {
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if (imm >= -32768 && imm < 32768)
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PPC_ADDI(4, 4, IMM_L(imm));
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else {
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PPC_LI32(b2p[TMP_REG_1], imm);
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PPC_ADD(4, 4, b2p[TMP_REG_1]);
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}
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}
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|
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common_load:
|
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ctx->seen |= SEEN_SKB;
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ctx->seen |= SEEN_FUNC;
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bpf_jit_emit_func_call(image, ctx, (u64)func);
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|
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/*
|
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* Helper returns 'lt' condition on error, and an
|
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* appropriate return value in BPF_REG_0
|
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*/
|
||||
PPC_BCC(COND_LT, exit_addr);
|
||||
break;
|
||||
|
||||
/*
|
||||
* Tail call
|
||||
*/
|
||||
|
|
Loading…
Reference in New Issue