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ALSA: hda - Fix doubly initialization of i915 component 

In the commit fcc88d91cd ("ALSA: hda - Bind with i915 component
before codec binding"), the binding with i915 audio component is moved
to be performed always at probing the controller.  This fixed the
potential problems on IVB, but now it brought another issue on HSW and
BDW.  These two platforms give two individual HD-audio controllers,
one for the analog codec on PCH and another for HDMI over gfx.  Since
I decided to take a lazy path to check only AZX_DRIVER_PCH type in the
commit above, now both controllers try to bind with i915, and you see
a kernel WARNING.

This patch tries to address it again properly.  Now a new DCAPS bit,
AZX_DCAPS_I915_COMPONENT, is introduced for indicating the binding
with i915 component in addition to the existing I915_POWERWELL bit
flag.  Each PCI entry has to give this new flag if it requires the
binding with i915 component.  For HSW/BDW PCH (i.e. the ones defined
by AZX_DCAPS_INTEL_PCH) doesn't contain AZX_DCAPS_I915_COMPONENT bit
while others have it.

While we're at it, add parentheses around the bit flag check for
avoiding possible compiler warnings, too.

The bug was spotted by Intel CI tests.

Fixes: fcc88d91cd ("ALSA: hda - Bind with i915 component before codec binding")
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=196219
Reported-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Takashi Iwai 2017-06-29 16:18:12 +02:00
parent a5a041b6b5
commit dba9b7b6ca
2 changed files with 27 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
sound/pci/hda/hda_controller.h
View File

@ -32,7 +32,11 @@
#define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
#define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
#define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
/* 13 unused */
#ifdef CONFIG_SND_HDA_I915
#define AZX_DCAPS_I915_COMPONENT (1 << 13) /* bind with i915 gfx */
#else
#define AZX_DCAPS_I915_COMPONENT 0 /* NOP */
#endif
/* 14 unused */
#define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
#define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */

40
sound/pci/hda/hda_intel.c
View File

@ -293,38 +293,43 @@ enum {
(AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
AZX_DCAPS_SNOOP_TYPE(SCH))
/* PCH up to IVB; no runtime PM */
/* PCH up to IVB; no runtime PM; bind with i915 gfx */
#define AZX_DCAPS_INTEL_PCH_NOPM \
(AZX_DCAPS_INTEL_PCH_BASE)
(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT)
/* PCH for HSW/BDW; with runtime PM */
/* no i915 binding for this as HSW/BDW has another controller for HDMI */
#define AZX_DCAPS_INTEL_PCH \
(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
/* HSW HDMI */
#define AZX_DCAPS_INTEL_HASWELL \
(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
AZX_DCAPS_SNOOP_TYPE(SCH))
AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
#define AZX_DCAPS_INTEL_BROADWELL \
(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
AZX_DCAPS_SNOOP_TYPE(SCH))
AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
#define AZX_DCAPS_INTEL_BAYTRAIL \
(AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)
(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT |\
AZX_DCAPS_I915_POWERWELL)
#define AZX_DCAPS_INTEL_BRASWELL \
(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)
(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL)
#define AZX_DCAPS_INTEL_SKYLAKE \
(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
AZX_DCAPS_I915_POWERWELL)
#define AZX_DCAPS_INTEL_BROXTON \
(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
AZX_DCAPS_I915_POWERWELL)
/* quirks for ATI SB / AMD Hudson */
@ -1008,7 +1013,7 @@ static int azx_suspend(struct device *dev)
if (chip->msi)
pci_disable_msi(chip->pci);
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
&& hda->need_i915_power)
snd_hdac_display_power(bus, false);
@ -1114,7 +1119,7 @@ static int azx_runtime_suspend(struct device *dev)
azx_stop_chip(chip);
azx_enter_link_reset(chip);
azx_clear_irq_pending(chip);
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
&& hda->need_i915_power)
snd_hdac_display_power(azx_bus(chip), false);
@ -1380,8 +1385,7 @@ static int azx_free(struct azx *chip)
if (hda->need_i915_power)
snd_hdac_display_power(bus, false);
}
if (chip->driver_type == AZX_DRIVER_PCH ||
(chip->driver_caps & AZX_DCAPS_I915_POWERWELL))
if (chip->driver_type & AZX_DCAPS_I915_COMPONENT)
snd_hdac_i915_exit(bus);
kfree(hda);
@ -2199,8 +2203,7 @@ static int azx_probe_continue(struct azx *chip)
hda->probe_continued = 1;
/* bind with i915 if needed */
if (chip->driver_type == AZX_DRIVER_PCH ||
(chip->driver_caps & AZX_DCAPS_I915_POWERWELL)) {
if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT) {
err = snd_hdac_i915_init(bus);
if (err < 0) {
/* if the controller is bound only with HDMI/DP
@ -2214,7 +2217,8 @@ static int azx_probe_continue(struct azx *chip)
goto out_free;
} else {
/* don't bother any longer */
chip->driver_caps &= ~AZX_DCAPS_I915_POWERWELL;
chip->driver_caps &=
~(AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL);
}
}
}
@ -2279,7 +2283,7 @@ static int azx_probe_continue(struct azx *chip)
pm_runtime_put_autosuspend(&pci->dev);
out_free:
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
&& !hda->need_i915_power)
snd_hdac_display_power(bus, false);