DRM: ingenic: Add support for Sharp panels
Add support for the LCD panels that must be driven with the Sharp-specific signals SPL, CLS, REV, PS. An example of such panel is the LS020B1DD01D supported by the panel-simple DRM panel driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190627182114.27299-2-paul@crapouillou.net # *** extracted tags *** Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
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@ -166,6 +166,8 @@ struct ingenic_drm {
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struct ingenic_dma_hwdesc *dma_hwdesc;
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struct ingenic_dma_hwdesc *dma_hwdesc;
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dma_addr_t dma_hwdesc_phys;
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dma_addr_t dma_hwdesc_phys;
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bool panel_is_sharp;
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};
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};
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static const u32 ingenic_drm_primary_formats[] = {
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static const u32 ingenic_drm_primary_formats[] = {
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@ -283,6 +285,13 @@ static void ingenic_drm_crtc_update_timings(struct ingenic_drm *priv,
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regmap_write(priv->map, JZ_REG_LCD_DAV,
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regmap_write(priv->map, JZ_REG_LCD_DAV,
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vds << JZ_LCD_DAV_VDS_OFFSET |
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vds << JZ_LCD_DAV_VDS_OFFSET |
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vde << JZ_LCD_DAV_VDE_OFFSET);
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vde << JZ_LCD_DAV_VDE_OFFSET);
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if (priv->panel_is_sharp) {
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regmap_write(priv->map, JZ_REG_LCD_PS, hde << 16 | (hde + 1));
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regmap_write(priv->map, JZ_REG_LCD_CLS, hde << 16 | (hde + 1));
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regmap_write(priv->map, JZ_REG_LCD_SPL, hpe << 16 | (hpe + 1));
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regmap_write(priv->map, JZ_REG_LCD_REV, mode->htotal << 16);
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}
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}
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}
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static void ingenic_drm_crtc_update_ctrl(struct ingenic_drm *priv,
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static void ingenic_drm_crtc_update_ctrl(struct ingenic_drm *priv,
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@ -378,11 +387,18 @@ static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
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{
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{
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struct ingenic_drm *priv = drm_encoder_get_priv(encoder);
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struct ingenic_drm *priv = drm_encoder_get_priv(encoder);
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struct drm_display_mode *mode = &crtc_state->adjusted_mode;
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struct drm_display_mode *mode = &crtc_state->adjusted_mode;
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struct drm_display_info *info = &conn_state->connector->display_info;
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struct drm_connector *conn = conn_state->connector;
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unsigned int cfg = JZ_LCD_CFG_PS_DISABLE
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struct drm_display_info *info = &conn->display_info;
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| JZ_LCD_CFG_CLS_DISABLE
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unsigned int cfg;
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| JZ_LCD_CFG_SPL_DISABLE
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| JZ_LCD_CFG_REV_DISABLE;
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priv->panel_is_sharp = info->bus_flags & DRM_BUS_FLAG_SHARP_SIGNALS;
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if (priv->panel_is_sharp) {
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cfg = JZ_LCD_CFG_MODE_SPECIAL_TFT_1 | JZ_LCD_CFG_REV_POLARITY;
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} else {
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cfg = JZ_LCD_CFG_PS_DISABLE | JZ_LCD_CFG_CLS_DISABLE
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| JZ_LCD_CFG_SPL_DISABLE | JZ_LCD_CFG_REV_DISABLE;
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}
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
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cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
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@ -393,24 +409,26 @@ static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
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if (info->bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
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if (info->bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
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cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
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cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
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if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_TV) {
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if (!priv->panel_is_sharp) {
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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if (conn->connector_type == DRM_MODE_CONNECTOR_TV) {
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cfg |= JZ_LCD_CFG_MODE_TV_OUT_I;
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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else
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cfg |= JZ_LCD_CFG_MODE_TV_OUT_I;
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cfg |= JZ_LCD_CFG_MODE_TV_OUT_P;
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else
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} else {
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cfg |= JZ_LCD_CFG_MODE_TV_OUT_P;
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switch (*info->bus_formats) {
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} else {
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case MEDIA_BUS_FMT_RGB565_1X16:
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switch (*info->bus_formats) {
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cfg |= JZ_LCD_CFG_MODE_GENERIC_16BIT;
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case MEDIA_BUS_FMT_RGB565_1X16:
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break;
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cfg |= JZ_LCD_CFG_MODE_GENERIC_16BIT;
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case MEDIA_BUS_FMT_RGB666_1X18:
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break;
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cfg |= JZ_LCD_CFG_MODE_GENERIC_18BIT;
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case MEDIA_BUS_FMT_RGB666_1X18:
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break;
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cfg |= JZ_LCD_CFG_MODE_GENERIC_18BIT;
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case MEDIA_BUS_FMT_RGB888_1X24:
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break;
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cfg |= JZ_LCD_CFG_MODE_GENERIC_24BIT;
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case MEDIA_BUS_FMT_RGB888_1X24:
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break;
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cfg |= JZ_LCD_CFG_MODE_GENERIC_24BIT;
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default:
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break;
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break;
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default:
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break;
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}
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}
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}
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}
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}
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