ASoC: Intel: common: add match tables for CNL/CFL/CML w/ SoundWire

The two configurations are with the Realtek 3-in-1 board requiring all
4 links to be enabled, or basic configuration with the on-board
RT700 using link1.

For now we only have definitions for CML. CNL and CFL are just
placeholders.

Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200110222530.30303-5-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Rander Wang 2020-01-10 16:25:28 -06:00 committed by Mark Brown
parent 4313dd3efe
commit db0b9efb98
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
3 changed files with 99 additions and 0 deletions

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@ -14,5 +14,10 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cfl_machines[] = {
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cfl_machines);
struct snd_soc_acpi_mach snd_soc_acpi_intel_cfl_sdw_machines[] = {
{}
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cfl_sdw_machines);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel Common ACPI Match module");

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@ -59,5 +59,94 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cml_machines[] = {
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cml_machines);
static const u64 rt711_0_adr[] = {
0x000010025D071100
};
static const u64 rt1308_1_adr[] = {
0x000110025D130800
};
static const u64 rt1308_2_adr[] = {
0x000210025D130800
};
static const u64 rt715_3_adr[] = {
0x000310025D071500
};
static const struct snd_soc_acpi_link_adr cml_3_in_1_default[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
},
{
.mask = BIT(2),
.num_adr = ARRAY_SIZE(rt1308_2_adr),
.adr = rt1308_2_adr,
},
{
.mask = BIT(3),
.num_adr = ARRAY_SIZE(rt715_3_adr),
.adr = rt715_3_adr,
},
{}
};
static const struct snd_soc_acpi_link_adr cml_3_in_1_mono_amp[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
},
{
.mask = BIT(3),
.num_adr = ARRAY_SIZE(rt715_3_adr),
.adr = rt715_3_adr,
},
{}
};
struct snd_soc_acpi_mach snd_soc_acpi_intel_cml_sdw_machines[] = {
{
.link_mask = 0xF, /* 4 active links required */
.links = cml_3_in_1_default,
.drv_name = "sdw_rt711_rt1308_rt715",
.sof_fw_filename = "sof-cml.ri",
.sof_tplg_filename = "sof-cml-rt711-rt1308-rt715.tplg",
},
{
/*
* link_mask should be 0xB, but all links are enabled by BIOS.
* This entry will be selected if there is no rt1308 exposed
* on link2 since it will fail to match the above entry.
*/
.link_mask = 0xF,
.links = cml_3_in_1_mono_amp,
.drv_name = "sdw_rt711_rt1308_rt715",
.sof_fw_filename = "sof-cml.ri",
.sof_tplg_filename = "sof-cml-rt711-rt1308-mono-rt715.tplg",
},
{
.link_mask = 0x2, /* RT700 connected on Link1 */
.drv_name = "sdw_rt700",
.sof_fw_filename = "sof-cml.ri",
.sof_tplg_filename = "sof-cml-rt700.tplg",
},
{}
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cml_sdw_machines);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel Common ACPI Match module");

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@ -27,5 +27,10 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_machines[] = {
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cnl_machines);
struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_sdw_machines[] = {
{},
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cnl_sdw_machines);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel Common ACPI Match module");