ARM: S3C24XX: trim down debug uart handling
Using the lowlevel debug uart is a corner case - even more so in a multiplatform environment. So it seems reasonable to simply let the developer set the appropriate uart type for the debugged SoC. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Heiko Stuebner
Kukjin Kim
parent
46f34abc75
commit
daf67dfc59
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@ -670,6 +670,33 @@ choice
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The uncompressor code port configuration is now handled
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by CONFIG_S3C_LOWLEVEL_UART_PORT.
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config DEBUG_S3C2410_UART0
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depends on ARCH_S3C24XX
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select DEBUG_S3C2410_UART
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bool "Use S3C2410/S3C2412 UART 0 for low-level debug"
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help
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Say Y here if you want the debug print routines to direct
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their output to UART 0. The port must have been initialised
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by the boot-loader before use.
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config DEBUG_S3C2410_UART1
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depends on ARCH_S3C24XX
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select DEBUG_S3C2410_UART
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bool "Use S3C2410/S3C2412 UART 1 for low-level debug"
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help
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Say Y here if you want the debug print routines to direct
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their output to UART 1. The port must have been initialised
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by the boot-loader before use.
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config DEBUG_S3C2410_UART2
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depends on ARCH_S3C24XX
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select DEBUG_S3C2410_UART
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bool "Use S3C2410/S3C2412 UART 2 for low-level debug"
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help
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Say Y here if you want the debug print routines to direct
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their output to UART 2. The port must have been initialised
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by the boot-loader before use.
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config DEBUG_SOCFPGA_UART
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depends on ARCH_SOCFPGA
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bool "Use SOCFPGA UART for low-level debug"
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@ -921,6 +948,9 @@ endchoice
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config DEBUG_EXYNOS_UART
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bool
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config DEBUG_S3C2410_UART
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bool
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config DEBUG_OMAP2PLUS_UART
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bool
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depends on ARCH_OMAP2PLUS
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@ -39,7 +39,6 @@ config CPU_S3C2410
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default y
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select COMMON_CLK
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select CPU_ARM920T
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select CPU_LLSERIAL_S3C2410
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select S3C2410_COMMON_CLK
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select S3C2410_DMA if S3C24XX_DMA
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select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
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@ -53,7 +52,6 @@ config CPU_S3C2412
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bool "SAMSUNG S3C2412"
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select COMMON_CLK
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select CPU_ARM926T
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select CPU_LLSERIAL_S3C2440
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select S3C2412_COMMON_CLK
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select S3C2412_DMA if S3C24XX_DMA
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select S3C2412_PM if PM
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@ -64,7 +62,6 @@ config CPU_S3C2416
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bool "SAMSUNG S3C2416/S3C2450"
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select COMMON_CLK
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select CPU_ARM926T
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select CPU_LLSERIAL_S3C2440
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select S3C2416_PM if PM
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select S3C2443_COMMON_CLK
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select S3C2443_DMA if S3C24XX_DMA
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@ -75,7 +72,6 @@ config CPU_S3C2440
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bool "SAMSUNG S3C2440"
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select COMMON_CLK
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select CPU_ARM920T
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select CPU_LLSERIAL_S3C2440
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select S3C2410_COMMON_CLK
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select S3C2410_PM if PM
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select S3C2440_DMA if S3C24XX_DMA
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@ -86,7 +82,6 @@ config CPU_S3C2442
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bool "SAMSUNG S3C2442"
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select COMMON_CLK
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select CPU_ARM920T
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select CPU_LLSERIAL_S3C2440
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select S3C2410_COMMON_CLK
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select S3C2410_DMA if S3C24XX_DMA
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select S3C2410_PM if PM
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@ -102,7 +97,6 @@ config CPU_S3C2443
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bool "SAMSUNG S3C2443"
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select COMMON_CLK
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select CPU_ARM920T
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select CPU_LLSERIAL_S3C2440
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select S3C2443_COMMON_CLK
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select S3C2443_DMA if S3C24XX_DMA
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help
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@ -164,28 +158,6 @@ config S3C2410_PM
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help
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Power Management code common to S3C2410 and better
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# low-level serial option nodes
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config CPU_LLSERIAL_S3C2410_ONLY
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bool
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default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
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config CPU_LLSERIAL_S3C2440_ONLY
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bool
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default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
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config CPU_LLSERIAL_S3C2410
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bool
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help
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Selected if there is an S3C2410 (or register compatible) serial
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low-level implementation needed
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config CPU_LLSERIAL_S3C2440
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bool
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help
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Selected if there is an S3C2440 (or register compatible) serial
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low-level implementation needed
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config S3C24XX_PLL
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bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
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depends on ARM_S3C24XX_CPUFREQ
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@ -13,11 +13,9 @@
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*/
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#include <mach/map.h>
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#include <mach/regs-gpio.h>
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#include <linux/serial_s3c.h>
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#define S3C2410_UART1_OFF (0x4000)
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#define SHIFT_2440TXF (14-9)
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.macro addruart, rp, rv, tmp
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ldr \rp, = S3C24XX_PA_UART
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@ -28,56 +26,11 @@
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#endif
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.endm
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.macro fifo_full_s3c24xx rd, rx
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@ check for arm920 vs arm926. currently assume all arm926
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@ devices have an 64 byte FIFO identical to the s3c2440
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mrc p15, 0, \rd, c0, c0
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and \rd, \rd, #0xff0
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teq \rd, #0x260
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beq 1004f
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mrc p15, 0, \rd, c1, c0
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tst \rd, #1
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addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
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addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
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bic \rd, \rd, #0xff000
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ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
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and \rd, \rd, #0x00ff0000
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teq \rd, #0x00440000 @ is it 2440?
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1004:
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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moveq \rd, \rd, lsr #SHIFT_2440TXF
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tst \rd, #S3C2410_UFSTAT_TXFULL
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.endm
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.macro fifo_full_s3c2410 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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tst \rd, #S3C2410_UFSTAT_TXFULL
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.endm
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/* fifo level reading */
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.macro fifo_level_s3c24xx rd, rx
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@ check for arm920 vs arm926. currently assume all arm926
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@ devices have an 64 byte FIFO identical to the s3c2440
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mrc p15, 0, \rd, c0, c0
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and \rd, \rd, #0xff0
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teq \rd, #0x260
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beq 10000f
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mrc p15, 0, \rd, c1, c0
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tst \rd, #1
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addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
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addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
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bic \rd, \rd, #0xff000
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ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
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and \rd, \rd, #0x00ff0000
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teq \rd, #0x00440000 @ is it 2440?
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10000:
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
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andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
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.endm
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.macro fifo_level_s3c2410 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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and \rd, \rd, #S3C2410_UFSTAT_TXMASK
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@ -88,12 +41,9 @@
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* used variants of these
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*/
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#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
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#if defined(CONFIG_DEBUG_S3C2410_UART)
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#define fifo_full fifo_full_s3c2410
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#define fifo_level fifo_level_s3c2410
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#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
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#define fifo_full fifo_full_s3c24xx
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#define fifo_level fifo_level_s3c24xx
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#endif
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/* include the reset of the code which will do the work */
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