drm/i915: use drm_i915_private everywhere in the power domain api
The power domains framework is internal to the i915 driver, so pass drm_i915_private instead of drm_device to its functions. Also remove a dangling intel_set_power_well() declaration. No functional change. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Imre Deak
Daniel Vetter
parent
7e696e4cad
commit
da7e29bd5b
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@ -1325,7 +1325,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
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if (ret)
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goto cleanup_gem_stolen;
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intel_power_domains_init_hw(dev);
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intel_power_domains_init_hw(dev_priv);
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/* Important: The output setup functions called by modeset_init need
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* working irqs for e.g. gmbus and dp aux transfers. */
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@ -1343,7 +1343,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
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/* FIXME: do pre/post-mode set stuff in core KMS code */
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dev->vblank_disable_allowed = true;
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if (INTEL_INFO(dev)->num_pipes == 0) {
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intel_display_power_put(dev, POWER_DOMAIN_VGA);
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intel_display_power_put(dev_priv, POWER_DOMAIN_VGA);
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return 0;
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}
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@ -1381,7 +1381,7 @@ cleanup_gem:
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WARN_ON(dev_priv->mm.aliasing_ppgtt);
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drm_mm_takedown(&dev_priv->gtt.base.mm);
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cleanup_power:
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intel_display_power_put(dev, POWER_DOMAIN_VGA);
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intel_display_power_put(dev_priv, POWER_DOMAIN_VGA);
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drm_irq_uninstall(dev);
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cleanup_gem_stolen:
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i915_gem_cleanup_stolen(dev);
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@ -1702,7 +1702,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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goto out_gem_unload;
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}
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intel_power_domains_init(dev);
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intel_power_domains_init(dev_priv);
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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ret = i915_load_modeset_init(dev);
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@ -1731,7 +1731,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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return 0;
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out_power_well:
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intel_power_domains_remove(dev);
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intel_power_domains_remove(dev_priv);
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drm_vblank_cleanup(dev);
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out_gem_unload:
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if (dev_priv->mm.inactive_shrinker.scan_objects)
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@ -1781,8 +1781,8 @@ int i915_driver_unload(struct drm_device *dev)
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/* The i915.ko module is still not prepared to be loaded when
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* the power well is not enabled, so just enable it in case
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* we're going to unload/reload. */
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intel_display_set_init_power(dev, true);
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intel_power_domains_remove(dev);
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intel_display_set_init_power(dev_priv, true);
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intel_power_domains_remove(dev_priv);
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i915_teardown_sysfs(dev);
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@ -434,7 +434,7 @@ static int i915_drm_freeze(struct drm_device *dev)
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/* We do a lot of poking in a lot of registers, make sure they work
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* properly. */
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hsw_disable_package_c8(dev_priv);
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intel_display_set_init_power(dev, true);
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intel_display_set_init_power(dev_priv, true);
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drm_kms_helper_poll_disable(dev);
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@ -556,7 +556,7 @@ static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
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mutex_unlock(&dev->struct_mutex);
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}
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intel_power_domains_init_hw(dev);
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intel_power_domains_init_hw(dev_priv);
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i915_restore_state(dev);
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intel_opregion_setup(dev);
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@ -1024,9 +1024,9 @@ struct i915_power_well {
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int count;
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unsigned long domains;
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void *data;
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void (*set)(struct drm_device *dev, struct i915_power_well *power_well,
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void (*set)(struct drm_i915_private *dev_priv, struct i915_power_well *power_well,
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bool enable);
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bool (*is_enabled)(struct drm_device *dev,
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bool (*is_enabled)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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};
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@ -1122,7 +1122,7 @@ void assert_pipe(struct drm_i915_private *dev_priv,
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if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
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state = true;
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if (!intel_display_power_enabled(dev_priv->dev,
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if (!intel_display_power_enabled(dev_priv,
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POWER_DOMAIN_TRANSCODER(cpu_transcoder))) {
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cur_state = false;
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} else {
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@ -6863,23 +6863,23 @@ static unsigned long get_pipe_power_domains(struct drm_device *dev,
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return mask;
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}
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void intel_display_set_init_power(struct drm_device *dev, bool enable)
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void intel_display_set_init_power(struct drm_i915_private *dev_priv,
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bool enable)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (dev_priv->power_domains.init_power_on == enable)
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return;
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if (enable)
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intel_display_power_get(dev, POWER_DOMAIN_INIT);
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intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
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else
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intel_display_power_put(dev, POWER_DOMAIN_INIT);
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intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
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dev_priv->power_domains.init_power_on = enable;
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}
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static void modeset_update_crtc_power_domains(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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unsigned long pipe_domains[I915_MAX_PIPES] = { 0, };
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struct intel_crtc *crtc;
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@ -6898,19 +6898,19 @@ static void modeset_update_crtc_power_domains(struct drm_device *dev)
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crtc->config.pch_pfit.enabled);
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for_each_power_domain(domain, pipe_domains[crtc->pipe])
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intel_display_power_get(dev, domain);
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intel_display_power_get(dev_priv, domain);
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}
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
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enum intel_display_power_domain domain;
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for_each_power_domain(domain, crtc->enabled_power_domains)
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intel_display_power_put(dev, domain);
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intel_display_power_put(dev_priv, domain);
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crtc->enabled_power_domains = pipe_domains[crtc->pipe];
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}
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intel_display_set_init_power(dev, false);
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intel_display_set_init_power(dev_priv, false);
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}
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static void haswell_modeset_global_resources(struct drm_device *dev)
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@ -6991,7 +6991,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
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pipe_config->cpu_transcoder = TRANSCODER_EDP;
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}
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if (!intel_display_power_enabled(dev,
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if (!intel_display_power_enabled(dev_priv,
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POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder)))
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return false;
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@ -7019,7 +7019,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
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intel_get_pipe_timings(crtc, pipe_config);
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pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
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if (intel_display_power_enabled(dev, pfit_domain))
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if (intel_display_power_enabled(dev_priv, pfit_domain))
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ironlake_get_pfit_config(crtc, pipe_config);
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if (IS_HASWELL(dev))
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@ -11595,7 +11595,8 @@ intel_display_capture_error_state(struct drm_device *dev)
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for_each_pipe(i) {
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error->pipe[i].power_domain_on =
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intel_display_power_enabled_sw(dev, POWER_DOMAIN_PIPE(i));
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intel_display_power_enabled_sw(dev_priv,
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POWER_DOMAIN_PIPE(i));
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if (!error->pipe[i].power_domain_on)
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continue;
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@ -11633,7 +11634,7 @@ intel_display_capture_error_state(struct drm_device *dev)
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enum transcoder cpu_transcoder = transcoders[i];
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error->transcoder[i].power_domain_on =
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intel_display_power_enabled_sw(dev,
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intel_display_power_enabled_sw(dev_priv,
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POWER_DOMAIN_TRANSCODER(cpu_transcoder));
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if (!error->transcoder[i].power_domain_on)
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continue;
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@ -732,7 +732,7 @@ ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
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bool intel_crtc_active(struct drm_crtc *crtc);
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void hsw_enable_ips(struct intel_crtc *crtc);
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void hsw_disable_ips(struct intel_crtc *crtc);
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void intel_display_set_init_power(struct drm_device *dev, bool enable);
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void intel_display_set_init_power(struct drm_i915_private *dev, bool enable);
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int valleyview_get_vco(struct drm_i915_private *dev_priv);
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void intel_mode_from_pipe_config(struct drm_display_mode *mode,
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struct intel_crtc_config *pipe_config);
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@ -871,18 +871,17 @@ bool intel_fbc_enabled(struct drm_device *dev);
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void intel_update_fbc(struct drm_device *dev);
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void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
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void intel_gpu_ips_teardown(void);
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int intel_power_domains_init(struct drm_device *dev);
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void intel_power_domains_remove(struct drm_device *dev);
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bool intel_display_power_enabled(struct drm_device *dev,
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int intel_power_domains_init(struct drm_i915_private *);
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void intel_power_domains_remove(struct drm_i915_private *);
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bool intel_display_power_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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bool intel_display_power_enabled_sw(struct drm_device *dev,
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bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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void intel_display_power_get(struct drm_device *dev,
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void intel_display_power_get(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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void intel_display_power_put(struct drm_device *dev,
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void intel_display_power_put(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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void intel_power_domains_init_hw(struct drm_device *dev);
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void intel_set_power_well(struct drm_device *dev, bool enable);
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void intel_power_domains_init_hw(struct drm_i915_private *dev_priv);
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void intel_enable_gt_powersave(struct drm_device *dev);
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void intel_disable_gt_powersave(struct drm_device *dev);
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void ironlake_teardown_rc6(struct drm_device *dev);
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@ -5205,19 +5205,16 @@ void intel_suspend_hw(struct drm_device *dev)
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* enable it, so check if it's enabled and also check if we've requested it to
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* be enabled.
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*/
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static bool hsw_power_well_enabled(struct drm_device *dev,
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static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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return I915_READ(HSW_PWR_WELL_DRIVER) ==
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(HSW_PWR_WELL_ENABLE_REQUEST | HSW_PWR_WELL_STATE_ENABLED);
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}
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bool intel_display_power_enabled_sw(struct drm_device *dev,
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bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct i915_power_domains *power_domains;
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power_domains = &dev_priv->power_domains;
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@ -5225,10 +5222,9 @@ bool intel_display_power_enabled_sw(struct drm_device *dev,
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return power_domains->domain_use_count[domain];
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}
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bool intel_display_power_enabled(struct drm_device *dev,
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bool intel_display_power_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct i915_power_domains *power_domains;
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struct i915_power_well *power_well;
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bool is_enabled;
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@ -5243,7 +5239,7 @@ bool intel_display_power_enabled(struct drm_device *dev,
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if (power_well->always_on)
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continue;
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if (!power_well->is_enabled(dev, power_well)) {
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if (!power_well->is_enabled(dev_priv, power_well)) {
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is_enabled = false;
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break;
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}
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@ -5309,10 +5305,9 @@ static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
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spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
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}
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static void hsw_set_power_well(struct drm_device *dev,
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static void hsw_set_power_well(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well, bool enable)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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bool is_enabled, enable_requested;
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uint32_t tmp;
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@ -5346,35 +5341,30 @@ static void hsw_set_power_well(struct drm_device *dev,
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}
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}
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static void __intel_power_well_get(struct drm_device *dev,
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static void __intel_power_well_get(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (!power_well->count++ && power_well->set) {
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hsw_disable_package_c8(dev_priv);
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power_well->set(dev, power_well, true);
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power_well->set(dev_priv, power_well, true);
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}
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}
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static void __intel_power_well_put(struct drm_device *dev,
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static void __intel_power_well_put(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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WARN_ON(!power_well->count);
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if (!--power_well->count && power_well->set &&
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i915.disable_power_well) {
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power_well->set(dev, power_well, false);
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power_well->set(dev_priv, power_well, false);
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hsw_enable_package_c8(dev_priv);
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}
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}
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void intel_display_power_get(struct drm_device *dev,
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void intel_display_power_get(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct i915_power_domains *power_domains;
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struct i915_power_well *power_well;
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int i;
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@ -5384,17 +5374,16 @@ void intel_display_power_get(struct drm_device *dev,
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mutex_lock(&power_domains->lock);
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for_each_power_well(i, power_well, BIT(domain), power_domains)
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__intel_power_well_get(dev, power_well);
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__intel_power_well_get(dev_priv, power_well);
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power_domains->domain_use_count[domain]++;
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mutex_unlock(&power_domains->lock);
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}
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void intel_display_power_put(struct drm_device *dev,
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void intel_display_power_put(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct i915_power_domains *power_domains;
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struct i915_power_well *power_well;
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int i;
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@ -5407,7 +5396,7 @@ void intel_display_power_put(struct drm_device *dev,
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power_domains->domain_use_count[domain]--;
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for_each_power_well_rev(i, power_well, BIT(domain), power_domains)
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__intel_power_well_put(dev, power_well);
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__intel_power_well_put(dev_priv, power_well);
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mutex_unlock(&power_domains->lock);
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}
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@ -5424,7 +5413,7 @@ void i915_request_power_well(void)
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dev_priv = container_of(hsw_pwr, struct drm_i915_private,
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power_domains);
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intel_display_power_get(dev_priv->dev, POWER_DOMAIN_AUDIO);
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intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
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}
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EXPORT_SYMBOL_GPL(i915_request_power_well);
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@ -5438,7 +5427,7 @@ void i915_release_power_well(void)
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dev_priv = container_of(hsw_pwr, struct drm_i915_private,
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power_domains);
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intel_display_power_put(dev_priv->dev, POWER_DOMAIN_AUDIO);
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intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);
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}
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EXPORT_SYMBOL_GPL(i915_release_power_well);
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@ -5483,9 +5472,8 @@ static struct i915_power_well bdw_power_wells[] = {
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(power_domains)->power_well_count = ARRAY_SIZE(__power_wells); \
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})
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int intel_power_domains_init(struct drm_device *dev)
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int intel_power_domains_init(struct drm_i915_private *dev_priv)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct i915_power_domains *power_domains = &dev_priv->power_domains;
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mutex_init(&power_domains->lock);
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@ -5494,10 +5482,10 @@ int intel_power_domains_init(struct drm_device *dev)
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* The enabling order will be from lower to higher indexed wells,
|
||||
* the disabling order is reversed.
|
||||
*/
|
||||
if (IS_HASWELL(dev)) {
|
||||
if (IS_HASWELL(dev_priv->dev)) {
|
||||
set_power_wells(power_domains, hsw_power_wells);
|
||||
hsw_pwr = power_domains;
|
||||
} else if (IS_BROADWELL(dev)) {
|
||||
} else if (IS_BROADWELL(dev_priv->dev)) {
|
||||
set_power_wells(power_domains, bdw_power_wells);
|
||||
hsw_pwr = power_domains;
|
||||
} else {
|
||||
|
|
@ -5507,14 +5495,13 @@ int intel_power_domains_init(struct drm_device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void intel_power_domains_remove(struct drm_device *dev)
|
||||
void intel_power_domains_remove(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
hsw_pwr = NULL;
|
||||
}
|
||||
|
||||
static void intel_power_domains_resume(struct drm_device *dev)
|
||||
static void intel_power_domains_resume(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct i915_power_domains *power_domains = &dev_priv->power_domains;
|
||||
struct i915_power_well *power_well;
|
||||
int i;
|
||||
|
|
@ -5522,7 +5509,7 @@ static void intel_power_domains_resume(struct drm_device *dev)
|
|||
mutex_lock(&power_domains->lock);
|
||||
for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) {
|
||||
if (power_well->set)
|
||||
power_well->set(dev, power_well, power_well->count > 0);
|
||||
power_well->set(dev_priv, power_well, power_well->count > 0);
|
||||
}
|
||||
mutex_unlock(&power_domains->lock);
|
||||
}
|
||||
|
|
@ -5533,15 +5520,13 @@ static void intel_power_domains_resume(struct drm_device *dev)
|
|||
* to be enabled, and it will only be disabled if none of the registers is
|
||||
* requesting it to be enabled.
|
||||
*/
|
||||
void intel_power_domains_init_hw(struct drm_device *dev)
|
||||
void intel_power_domains_init_hw(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
||||
/* For now, we need the power well to be always enabled. */
|
||||
intel_display_set_init_power(dev, true);
|
||||
intel_power_domains_resume(dev);
|
||||
intel_display_set_init_power(dev_priv, true);
|
||||
intel_power_domains_resume(dev_priv);
|
||||
|
||||
if (!(IS_HASWELL(dev) || IS_BROADWELL(dev)))
|
||||
if (!(IS_HASWELL(dev_priv->dev) || IS_BROADWELL(dev_priv->dev)))
|
||||
return;
|
||||
|
||||
/* We're taking over the BIOS, so clear any requests made by it since
|
||||
|
|
|
|||
Loading…
Reference in New Issue