iwlwifi: debug flow cleanup
Cleanup of the debug flow by moving several flows to separate functions to increase readability. Three functions were created: 1. iwl_fw_get_prph_len - returns the size needed for periphery dump. 2. iwl_fw_dump_mem for - executes the memory dumping flow. 3. iwl_trans_get_fw_monitor_len - returns the size needed for monitor dump. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
parent
838f4c73a3
commit
da7527173b
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@ -538,12 +538,108 @@ static struct scatterlist *alloc_sgtable(int size)
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return table;
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}
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static int iwl_fw_get_prph_len(struct iwl_fw_runtime *fwrt)
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{
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u32 prph_len = 0;
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int i;
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for (i = 0; i < ARRAY_SIZE(iwl_prph_dump_addr_comm);
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i++) {
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/* The range includes both boundaries */
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int num_bytes_in_chunk =
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iwl_prph_dump_addr_comm[i].end -
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iwl_prph_dump_addr_comm[i].start + 4;
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prph_len += sizeof(struct iwl_fw_error_dump_data) +
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sizeof(struct iwl_fw_error_dump_prph) +
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num_bytes_in_chunk;
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}
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if (fwrt->trans->cfg->mq_rx_supported) {
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for (i = 0; i <
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ARRAY_SIZE(iwl_prph_dump_addr_9000); i++) {
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/* The range includes both boundaries */
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int num_bytes_in_chunk =
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iwl_prph_dump_addr_9000[i].end -
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iwl_prph_dump_addr_9000[i].start + 4;
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prph_len += sizeof(struct iwl_fw_error_dump_data) +
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sizeof(struct iwl_fw_error_dump_prph) +
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num_bytes_in_chunk;
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}
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}
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return prph_len;
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}
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static void iwl_fw_dump_mem(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_error_dump_data **dump_data,
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u32 sram_len, u32 sram_ofs, u32 smem_len,
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u32 sram2_len)
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{
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const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem = fwrt->fw->dbg_mem_tlv;
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struct iwl_fw_error_dump_mem *dump_mem;
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int i;
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if (!fwrt->fw->n_dbg_mem_tlv) {
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(*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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(*dump_data)->len = cpu_to_le32(sram_len + sizeof(*dump_mem));
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dump_mem = (void *)(*dump_data)->data;
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dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM);
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dump_mem->offset = cpu_to_le32(sram_ofs);
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iwl_trans_read_mem_bytes(fwrt->trans, sram_ofs, dump_mem->data,
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sram_len);
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*dump_data = iwl_fw_error_next_data(*dump_data);
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}
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for (i = 0; i < fwrt->fw->n_dbg_mem_tlv; i++) {
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u32 len = le32_to_cpu(fw_dbg_mem[i].len);
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u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
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(*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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(*dump_data)->len = cpu_to_le32(len + sizeof(*dump_mem));
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dump_mem = (void *)(*dump_data)->data;
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dump_mem->type = fw_dbg_mem[i].data_type;
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dump_mem->offset = cpu_to_le32(ofs);
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IWL_DEBUG_INFO(fwrt, "WRT memory dump. Type=%u\n",
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dump_mem->type);
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iwl_trans_read_mem_bytes(fwrt->trans, ofs, dump_mem->data, len);
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*dump_data = iwl_fw_error_next_data(*dump_data);
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}
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if (smem_len) {
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IWL_DEBUG_INFO(fwrt, "WRT SMEM dump\n");
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(*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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(*dump_data)->len = cpu_to_le32(smem_len + sizeof(*dump_mem));
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dump_mem = (void *)(*dump_data)->data;
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dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SMEM);
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dump_mem->offset = cpu_to_le32(fwrt->trans->cfg->smem_offset);
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iwl_trans_read_mem_bytes(fwrt->trans,
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fwrt->trans->cfg->smem_offset,
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dump_mem->data, smem_len);
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*dump_data = iwl_fw_error_next_data(*dump_data);
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}
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if (sram2_len) {
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IWL_DEBUG_INFO(fwrt, "WRT SRAM dump\n");
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(*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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(*dump_data)->len = cpu_to_le32(sram2_len + sizeof(*dump_mem));
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dump_mem = (void *)(*dump_data)->data;
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dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM);
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dump_mem->offset = cpu_to_le32(fwrt->trans->cfg->dccm2_offset);
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iwl_trans_read_mem_bytes(fwrt->trans,
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fwrt->trans->cfg->dccm2_offset,
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dump_mem->data, sram2_len);
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*dump_data = iwl_fw_error_next_data(*dump_data);
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}
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}
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void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
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{
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struct iwl_fw_error_dump_file *dump_file;
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struct iwl_fw_error_dump_data *dump_data;
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struct iwl_fw_error_dump_info *dump_info;
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struct iwl_fw_error_dump_mem *dump_mem;
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struct iwl_fw_error_dump_smem_cfg *dump_smem_cfg;
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struct iwl_fw_error_dump_trigger_desc *dump_trig;
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struct iwl_fw_dump_ptrs *fw_error_dump;
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@ -655,35 +751,8 @@ void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
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/* Make room for PRPH registers */
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if (!fwrt->trans->cfg->gen2 &&
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fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_PRPH)) {
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for (i = 0; i < ARRAY_SIZE(iwl_prph_dump_addr_comm);
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i++) {
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/* The range includes both boundaries */
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int num_bytes_in_chunk =
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iwl_prph_dump_addr_comm[i].end -
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iwl_prph_dump_addr_comm[i].start + 4;
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prph_len += sizeof(*dump_data) +
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sizeof(struct iwl_fw_error_dump_prph) +
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num_bytes_in_chunk;
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}
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}
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if (!fwrt->trans->cfg->gen2 &&
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fwrt->trans->cfg->mq_rx_supported &&
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fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_PRPH)) {
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for (i = 0; i <
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ARRAY_SIZE(iwl_prph_dump_addr_9000); i++) {
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/* The range includes both boundaries */
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int num_bytes_in_chunk =
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iwl_prph_dump_addr_9000[i].end -
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iwl_prph_dump_addr_9000[i].start + 4;
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prph_len += sizeof(*dump_data) +
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sizeof(struct iwl_fw_error_dump_prph) +
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num_bytes_in_chunk;
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}
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}
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fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_PRPH))
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prph_len += iwl_fw_get_prph_len(fwrt);
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if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000 &&
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fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_RADIO_REG))
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@ -703,18 +772,19 @@ void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
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if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM)) {
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/* Make room for the SMEM, if it exists */
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if (smem_len)
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file_len += sizeof(*dump_data) + sizeof(*dump_mem) +
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smem_len;
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file_len += sizeof(*dump_data) + smem_len +
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sizeof(struct iwl_fw_error_dump_mem);
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/* Make room for the secondary SRAM, if it exists */
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if (sram2_len)
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file_len += sizeof(*dump_data) + sizeof(*dump_mem) +
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sram2_len;
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file_len += sizeof(*dump_data) + sram2_len +
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sizeof(struct iwl_fw_error_dump_mem);
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/* Make room for MEM segments */
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for (i = 0; i < fwrt->fw->n_dbg_mem_tlv; i++) {
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file_len += sizeof(*dump_data) + sizeof(*dump_mem) +
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le32_to_cpu(fw_dbg_mem[i].len);
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file_len += sizeof(*dump_data) +
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le32_to_cpu(fw_dbg_mem[i].len) +
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sizeof(struct iwl_fw_error_dump_mem);
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}
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}
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@ -746,7 +816,8 @@ void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
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if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM) &&
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!fwrt->fw->n_dbg_mem_tlv)
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file_len += sizeof(*dump_data) + sram_len + sizeof(*dump_mem);
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file_len += sizeof(*dump_data) + sram_len +
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sizeof(struct iwl_fw_error_dump_mem);
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dump_file = vzalloc(file_len);
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if (!dump_file) {
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@ -833,17 +904,10 @@ void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
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if (monitor_dump_only)
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goto dump_trans_data;
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if (!fwrt->fw->n_dbg_mem_tlv &&
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fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM)) {
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dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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dump_data->len = cpu_to_le32(sram_len + sizeof(*dump_mem));
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dump_mem = (void *)dump_data->data;
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dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM);
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dump_mem->offset = cpu_to_le32(sram_ofs);
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iwl_trans_read_mem_bytes(fwrt->trans, sram_ofs, dump_mem->data,
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sram_len);
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dump_data = iwl_fw_error_next_data(dump_data);
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}
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if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM))
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iwl_fw_dump_mem(fwrt, &dump_data, sram_len, sram_ofs, smem_len,
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sram2_len);
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if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
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u32 addr = fwrt->trans->cfg->d3_debug_data_base_addr;
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@ -852,8 +916,7 @@ void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
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dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA);
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dump_data->len = cpu_to_le32(data_size * 2);
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memcpy(dump_data->data, fwrt->dump.d3_debug_data,
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data_size);
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memcpy(dump_data->data, fwrt->dump.d3_debug_data, data_size);
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kfree(fwrt->dump.d3_debug_data);
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fwrt->dump.d3_debug_data = NULL;
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@ -865,55 +928,6 @@ void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
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dump_data = iwl_fw_error_next_data(dump_data);
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}
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for (i = 0; i < fwrt->fw->n_dbg_mem_tlv; i++) {
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u32 len = le32_to_cpu(fw_dbg_mem[i].len);
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u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
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if (!(fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM)))
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break;
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dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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dump_data->len = cpu_to_le32(len + sizeof(*dump_mem));
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dump_mem = (void *)dump_data->data;
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dump_mem->type = fw_dbg_mem[i].data_type;
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dump_mem->offset = cpu_to_le32(ofs);
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IWL_DEBUG_INFO(fwrt, "WRT memory dump. Type=%u\n",
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dump_mem->type);
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iwl_trans_read_mem_bytes(fwrt->trans, ofs,
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dump_mem->data,
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len);
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dump_data = iwl_fw_error_next_data(dump_data);
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}
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if (smem_len && fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM)) {
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IWL_DEBUG_INFO(fwrt, "WRT SMEM dump\n");
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dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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dump_data->len = cpu_to_le32(smem_len + sizeof(*dump_mem));
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dump_mem = (void *)dump_data->data;
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dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SMEM);
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dump_mem->offset = cpu_to_le32(fwrt->trans->cfg->smem_offset);
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iwl_trans_read_mem_bytes(fwrt->trans,
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fwrt->trans->cfg->smem_offset,
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dump_mem->data, smem_len);
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dump_data = iwl_fw_error_next_data(dump_data);
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}
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if (sram2_len && fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM)) {
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IWL_DEBUG_INFO(fwrt, "WRT SRAM dump\n");
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dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
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dump_data->len = cpu_to_le32(sram2_len + sizeof(*dump_mem));
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dump_mem = (void *)dump_data->data;
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dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM);
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dump_mem->offset = cpu_to_le32(fwrt->trans->cfg->dccm2_offset);
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iwl_trans_read_mem_bytes(fwrt->trans,
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fwrt->trans->cfg->dccm2_offset,
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dump_mem->data, sram2_len);
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dump_data = iwl_fw_error_next_data(dump_data);
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}
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/* Dump fw's virtual image */
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if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_PAGING) &&
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!fwrt->trans->cfg->gen2 &&
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@ -2912,36 +2912,17 @@ iwl_trans_pcie_dump_monitor(struct iwl_trans *trans,
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return len;
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}
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static struct iwl_trans_dump_data
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*iwl_trans_pcie_dump_data(struct iwl_trans *trans,
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const struct iwl_fw_dbg_trigger_tlv *trigger)
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static int iwl_trans_get_fw_monitor_len(struct iwl_trans *trans, int *len)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_fw_error_dump_data *data;
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struct iwl_txq *cmdq = trans_pcie->txq[trans_pcie->cmd_queue];
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struct iwl_fw_error_dump_txcmd *txcmd;
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struct iwl_trans_dump_data *dump_data;
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u32 len, num_rbs = 0;
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u32 monitor_len;
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int i, ptr;
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bool dump_rbs = test_bit(STATUS_FW_ERROR, &trans->status) &&
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!trans->cfg->mq_rx_supported &&
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trans->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_RB);
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/* transport dump header */
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len = sizeof(*dump_data);
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/* host commands */
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len += sizeof(*data) +
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cmdq->n_window * (sizeof(*txcmd) + TFD_MAX_PAYLOAD_SIZE);
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/* FW monitor */
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if (trans_pcie->fw_mon_cpu_addr) {
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len += sizeof(*data) + sizeof(struct iwl_fw_error_dump_fw_mon) +
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trans_pcie->fw_mon_size;
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monitor_len = trans_pcie->fw_mon_size;
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*len += sizeof(struct iwl_fw_error_dump_data) +
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sizeof(struct iwl_fw_error_dump_fw_mon) +
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trans_pcie->fw_mon_size;
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return trans_pcie->fw_mon_size;
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} else if (trans->dbg_dest_tlv) {
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u32 base, end, cfg_reg;
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u32 base, end, cfg_reg, monitor_len;
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if (trans->dbg_dest_tlv->version == 1) {
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cfg_reg = le32_to_cpu(trans->dbg_dest_tlv->base_reg);
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@ -2971,11 +2952,39 @@ static struct iwl_trans_dump_data
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end += (1 << trans->dbg_dest_tlv->end_shift);
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monitor_len = end - base;
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}
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len += sizeof(*data) + sizeof(struct iwl_fw_error_dump_fw_mon) +
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monitor_len;
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} else {
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monitor_len = 0;
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*len += sizeof(struct iwl_fw_error_dump_data) +
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sizeof(struct iwl_fw_error_dump_fw_mon) +
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monitor_len;
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return monitor_len;
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}
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return 0;
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}
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static struct iwl_trans_dump_data
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*iwl_trans_pcie_dump_data(struct iwl_trans *trans,
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const struct iwl_fw_dbg_trigger_tlv *trigger)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_fw_error_dump_data *data;
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struct iwl_txq *cmdq = trans_pcie->txq[trans_pcie->cmd_queue];
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struct iwl_fw_error_dump_txcmd *txcmd;
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struct iwl_trans_dump_data *dump_data;
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u32 len, num_rbs = 0;
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u32 monitor_len;
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int i, ptr;
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bool dump_rbs = test_bit(STATUS_FW_ERROR, &trans->status) &&
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!trans->cfg->mq_rx_supported &&
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trans->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_RB);
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/* transport dump header */
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len = sizeof(*dump_data);
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/* host commands */
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len += sizeof(*data) +
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cmdq->n_window * (sizeof(*txcmd) + TFD_MAX_PAYLOAD_SIZE);
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/* FW monitor */
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monitor_len = iwl_trans_get_fw_monitor_len(trans, &len);
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if (trigger && (trigger->mode & IWL_FW_DBG_TRIGGER_MONITOR_ONLY)) {
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if (!(trans->dbg_dump_mask &
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