MIPS: Alchemy: Simplify DMA channel allocation code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Manuel Lauss <manuel.lauss@googlemail.com>
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@ -237,7 +237,7 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
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void (*callback)(int, void *), void *callparam)
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{
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unsigned long flags;
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u32 used, chan, rv;
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u32 used, chan;
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u32 dcp;
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int i;
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dbdev_tab_t *stp, *dtp;
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@ -260,7 +260,6 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
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return 0;
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used = 0;
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rv = 0;
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/* Check to see if we can get both channels. */
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spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags);
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@ -281,63 +280,65 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
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used++;
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spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags);
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if (!used) {
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/* Let's see if we can allocate a channel for it. */
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ctp = NULL;
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chan = 0;
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spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags);
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for (i = 0; i < NUM_DBDMA_CHANS; i++)
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if (chan_tab_ptr[i] == NULL) {
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/*
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* If kmalloc fails, it is caught below same
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* as a channel not available.
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*/
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ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC);
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chan_tab_ptr[i] = ctp;
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break;
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}
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spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags);
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if (used)
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return 0;
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if (ctp != NULL) {
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memset(ctp, 0, sizeof(chan_tab_t));
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ctp->chan_index = chan = i;
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dcp = DDMA_CHANNEL_BASE;
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dcp += (0x0100 * chan);
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ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
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cp = (au1x_dma_chan_t *)dcp;
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ctp->chan_src = stp;
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ctp->chan_dest = dtp;
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ctp->chan_callback = callback;
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ctp->chan_callparam = callparam;
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/* Initialize channel configuration. */
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i = 0;
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if (stp->dev_intlevel)
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i |= DDMA_CFG_SED;
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if (stp->dev_intpolarity)
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i |= DDMA_CFG_SP;
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if (dtp->dev_intlevel)
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i |= DDMA_CFG_DED;
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if (dtp->dev_intpolarity)
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i |= DDMA_CFG_DP;
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if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
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(dtp->dev_flags & DEV_FLAGS_SYNC))
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i |= DDMA_CFG_SYNC;
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cp->ddma_cfg = i;
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au_sync();
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/* Return a non-zero value that can be used to
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* find the channel information in subsequent
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* operations.
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/* Let's see if we can allocate a channel for it. */
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ctp = NULL;
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chan = 0;
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spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags);
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for (i = 0; i < NUM_DBDMA_CHANS; i++)
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if (chan_tab_ptr[i] == NULL) {
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/*
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* If kmalloc fails, it is caught below same
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* as a channel not available.
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*/
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rv = (u32)(&chan_tab_ptr[chan]);
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} else {
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/* Release devices */
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stp->dev_flags &= ~DEV_FLAGS_INUSE;
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dtp->dev_flags &= ~DEV_FLAGS_INUSE;
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ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC);
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chan_tab_ptr[i] = ctp;
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break;
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}
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spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags);
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if (ctp != NULL) {
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memset(ctp, 0, sizeof(chan_tab_t));
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ctp->chan_index = chan = i;
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dcp = DDMA_CHANNEL_BASE;
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dcp += (0x0100 * chan);
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ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
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cp = (au1x_dma_chan_t *)dcp;
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ctp->chan_src = stp;
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ctp->chan_dest = dtp;
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ctp->chan_callback = callback;
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ctp->chan_callparam = callparam;
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/* Initialize channel configuration. */
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i = 0;
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if (stp->dev_intlevel)
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i |= DDMA_CFG_SED;
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if (stp->dev_intpolarity)
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i |= DDMA_CFG_SP;
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if (dtp->dev_intlevel)
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i |= DDMA_CFG_DED;
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if (dtp->dev_intpolarity)
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i |= DDMA_CFG_DP;
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if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
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(dtp->dev_flags & DEV_FLAGS_SYNC))
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i |= DDMA_CFG_SYNC;
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cp->ddma_cfg = i;
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au_sync();
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/*
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* Return a non-zero value that can be used to find the channel
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* information in subsequent operations.
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*/
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return (u32)(&chan_tab_ptr[chan]);
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}
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return rv;
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/* Release devices */
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stp->dev_flags &= ~DEV_FLAGS_INUSE;
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dtp->dev_flags &= ~DEV_FLAGS_INUSE;
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return 0;
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}
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EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
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