powerpc: drop MPC834x_MDS platform support
This 2006 era Modular Development System (MDS) has, at its core
component, a full length card with a PCI-64 edge. No case. Serial
and network connectors were on card, so it could optionally be fitted
with plastic stand-offs and run stand-alone off a power brick.
Like all the MDS systems, it was meant as a vehicle to get the CPU
out early to hardware OEMs so software and board development could
take place in parallel.
To that end, the BGA CPU was held in place with a mechanical spring
loaded pressure assembly (vs. solder) so that early rev silicon could
be replaced in the field. Not for COTS deployment!
These were made in limited numbers and availability preference was
given to partners who were planning to make their own boards, like
our WR SBC8349 [since retired in v4.18 (2017, commit 3bc6cf5a86)]
Given that the whole reason for existence was to assist in enabling
new board designs [not happening for 10+ years], and that they weren't
generally available, and that the hardware wasn't really hobbyist
friendly even for retro computing, it makes sense to retire the
support for this platform.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230220115913.25811-2-paul.gortmaker@windriver.com
This commit is contained in:
Paul Gortmaker
Michael Ellerman
parent
df9cad0949
commit
da03101799
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@ -338,7 +338,6 @@ image-$(CONFIG_MPC832x_MDS) += cuImage.mpc832x_mds
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image-$(CONFIG_MPC832x_RDB) += cuImage.mpc832x_rdb
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image-$(CONFIG_MPC834x_ITX) += cuImage.mpc8349emitx \
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cuImage.mpc8349emitxgp
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image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds
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image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds
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image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
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@ -1,403 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MPC8349E MDS Device Tree Source
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*
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* Copyright 2005, 2006 Freescale Semiconductor Inc.
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*/
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/dts-v1/;
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/ {
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model = "MPC8349EMDS";
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compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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pci1 = &pci1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8349@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <32768>;
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i-cache-size = <32768>;
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timebase-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x10000000>; // 256MB at 0
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};
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bcsr@e2400000 {
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compatible = "fsl,mpc8349mds-bcsr";
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reg = <0xe2400000 0x8000>;
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};
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soc8349@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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ranges = <0x0 0xe0000000 0x00100000>;
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reg = <0xe0000000 0x00000200>;
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bus-frequency = <0>;
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wdt@200 {
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device_type = "watchdog";
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compatible = "mpc83xx_wdt";
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reg = <0x200 0x100>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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interrupts = <14 0x8>;
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interrupt-parent = <&ipic>;
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dfsrr;
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rtc@68 {
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compatible = "dallas,ds1374";
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reg = <0x68>;
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};
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};
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i2c@3100 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <0x3100 0x100>;
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interrupts = <15 0x8>;
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interrupt-parent = <&ipic>;
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dfsrr;
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};
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spi@7000 {
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cell-index = <0>;
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compatible = "fsl,spi";
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reg = <0x7000 0x1000>;
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interrupts = <16 0x8>;
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interrupt-parent = <&ipic>;
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mode = "cpu";
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};
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dma@82a8 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
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reg = <0x82a8 4>;
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ranges = <0 0x8100 0x1a8>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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cell-index = <0>;
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dma-channel@0 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0 0x80>;
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cell-index = <0>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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dma-channel@80 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0x80 0x80>;
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cell-index = <1>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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dma-channel@100 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0x100 0x80>;
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cell-index = <2>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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dma-channel@180 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0x180 0x28>;
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cell-index = <3>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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};
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/* phy type (ULPI or SERIAL) are only types supported for MPH */
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/* port = 0 or 1 */
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usb@22000 {
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compatible = "fsl-usb2-mph";
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reg = <0x22000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&ipic>;
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interrupts = <39 0x8>;
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phy_type = "ulpi";
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port0;
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};
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/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
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usb@23000 {
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compatible = "fsl-usb2-dr";
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reg = <0x23000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&ipic>;
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interrupts = <38 0x8>;
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dr_mode = "otg";
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phy_type = "ulpi";
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};
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enet0: ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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ranges = <0x0 0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <32 0x8 33 0x8 34 0x8>;
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interrupt-parent = <&ipic>;
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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linux,network-index = <0>;
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mdio@520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <0x520 0x20>;
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phy0: ethernet-phy@0 {
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interrupt-parent = <&ipic>;
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interrupts = <17 0x8>;
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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interrupt-parent = <&ipic>;
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interrupts = <18 0x8>;
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reg = <0x1>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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enet1: ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <1>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <35 0x8 36 0x8 37 0x8>;
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interrupt-parent = <&ipic>;
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tbi-handle = <&tbi1>;
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phy-handle = <&phy1>;
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linux,network-index = <1>;
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mdio@520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-tbi";
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reg = <0x520 0x20>;
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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interrupts = <9 0x8>;
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interrupt-parent = <&ipic>;
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};
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serial1: serial@4600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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interrupts = <10 0x8>;
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interrupt-parent = <&ipic>;
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};
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crypto@30000 {
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compatible = "fsl,sec2.0";
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reg = <0x30000 0x10000>;
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interrupts = <11 0x8>;
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interrupt-parent = <&ipic>;
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fsl,num-channels = <4>;
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x7e>;
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fsl,descriptor-types-mask = <0x01010ebf>;
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};
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/* IPIC
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* interrupts cell = <intr #, sense>
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* sense values match linux IORESOURCE_IRQ_* defines:
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* sense == 8: Level, low assertion
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* sense == 2: Edge, high-to-low change
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*/
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ipic: pic@700 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x700 0x100>;
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device_type = "ipic";
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};
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};
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pci0: pci@e0008500 {
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x11 */
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0x8800 0x0 0x0 0x1 &ipic 20 0x8
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0x8800 0x0 0x0 0x2 &ipic 21 0x8
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0x8800 0x0 0x0 0x3 &ipic 22 0x8
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0x8800 0x0 0x0 0x4 &ipic 23 0x8
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/* IDSEL 0x12 */
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0x9000 0x0 0x0 0x1 &ipic 22 0x8
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0x9000 0x0 0x0 0x2 &ipic 23 0x8
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0x9000 0x0 0x0 0x3 &ipic 20 0x8
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0x9000 0x0 0x0 0x4 &ipic 21 0x8
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/* IDSEL 0x13 */
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0x9800 0x0 0x0 0x1 &ipic 23 0x8
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0x9800 0x0 0x0 0x2 &ipic 20 0x8
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0x9800 0x0 0x0 0x3 &ipic 21 0x8
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0x9800 0x0 0x0 0x4 &ipic 22 0x8
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/* IDSEL 0x15 */
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0xa800 0x0 0x0 0x1 &ipic 20 0x8
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0xa800 0x0 0x0 0x2 &ipic 21 0x8
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0xa800 0x0 0x0 0x3 &ipic 22 0x8
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0xa800 0x0 0x0 0x4 &ipic 23 0x8
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/* IDSEL 0x16 */
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0xb000 0x0 0x0 0x1 &ipic 23 0x8
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0xb000 0x0 0x0 0x2 &ipic 20 0x8
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0xb000 0x0 0x0 0x3 &ipic 21 0x8
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0xb000 0x0 0x0 0x4 &ipic 22 0x8
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/* IDSEL 0x17 */
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0xb800 0x0 0x0 0x1 &ipic 22 0x8
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0xb800 0x0 0x0 0x2 &ipic 23 0x8
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0xb800 0x0 0x0 0x3 &ipic 20 0x8
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0xb800 0x0 0x0 0x4 &ipic 21 0x8
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/* IDSEL 0x18 */
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0xc000 0x0 0x0 0x1 &ipic 21 0x8
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0xc000 0x0 0x0 0x2 &ipic 22 0x8
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0xc000 0x0 0x0 0x3 &ipic 23 0x8
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0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
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interrupt-parent = <&ipic>;
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interrupts = <66 0x8>;
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bus-range = <0 0>;
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ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
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0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
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0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xe0008500 0x100 /* internal registers */
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0xe0008300 0x8>; /* config space access registers */
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compatible = "fsl,mpc8349-pci";
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device_type = "pci";
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};
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pci1: pci@e0008600 {
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x11 */
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0x8800 0x0 0x0 0x1 &ipic 20 0x8
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0x8800 0x0 0x0 0x2 &ipic 21 0x8
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0x8800 0x0 0x0 0x3 &ipic 22 0x8
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0x8800 0x0 0x0 0x4 &ipic 23 0x8
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/* IDSEL 0x12 */
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0x9000 0x0 0x0 0x1 &ipic 22 0x8
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0x9000 0x0 0x0 0x2 &ipic 23 0x8
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0x9000 0x0 0x0 0x3 &ipic 20 0x8
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0x9000 0x0 0x0 0x4 &ipic 21 0x8
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/* IDSEL 0x13 */
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0x9800 0x0 0x0 0x1 &ipic 23 0x8
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0x9800 0x0 0x0 0x2 &ipic 20 0x8
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0x9800 0x0 0x0 0x3 &ipic 21 0x8
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0x9800 0x0 0x0 0x4 &ipic 22 0x8
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/* IDSEL 0x15 */
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0xa800 0x0 0x0 0x1 &ipic 20 0x8
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0xa800 0x0 0x0 0x2 &ipic 21 0x8
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0xa800 0x0 0x0 0x3 &ipic 22 0x8
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0xa800 0x0 0x0 0x4 &ipic 23 0x8
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/* IDSEL 0x16 */
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0xb000 0x0 0x0 0x1 &ipic 23 0x8
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0xb000 0x0 0x0 0x2 &ipic 20 0x8
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0xb000 0x0 0x0 0x3 &ipic 21 0x8
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0xb000 0x0 0x0 0x4 &ipic 22 0x8
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/* IDSEL 0x17 */
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0xb800 0x0 0x0 0x1 &ipic 22 0x8
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0xb800 0x0 0x0 0x2 &ipic 23 0x8
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0xb800 0x0 0x0 0x3 &ipic 20 0x8
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0xb800 0x0 0x0 0x4 &ipic 21 0x8
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/* IDSEL 0x18 */
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0xc000 0x0 0x0 0x1 &ipic 21 0x8
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0xc000 0x0 0x0 0x2 &ipic 22 0x8
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0xc000 0x0 0x0 0x3 &ipic 23 0x8
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0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
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interrupt-parent = <&ipic>;
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interrupts = <67 0x8>;
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bus-range = <0 0>;
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ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
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0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
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0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xe0008600 0x100 /* internal registers */
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0xe0008380 0x8>; /* config space access registers */
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compatible = "fsl,mpc8349-pci";
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device_type = "pci";
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};
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};
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@ -1,58 +0,0 @@
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CONFIG_SYSVIPC=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_EXPERT=y
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# CONFIG_KALLSYMS is not set
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_PARTITION_ADVANCED=y
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||||
# CONFIG_MSDOS_PARTITION is not set
|
||||
# CONFIG_PPC_CHRP is not set
|
||||
# CONFIG_PPC_PMAC is not set
|
||||
CONFIG_PPC_83xx=y
|
||||
CONFIG_MPC834x_MDS=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=m
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=32768
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_GIANFAR=y
|
||||
CONFIG_E100=y
|
||||
CONFIG_MARVELL_PHY=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MPC=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_DS1374=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
|
|
@ -13,7 +13,6 @@ CONFIG_PPC_83xx=y
|
|||
CONFIG_MPC831x_RDB=y
|
||||
CONFIG_MPC832x_MDS=y
|
||||
CONFIG_MPC832x_RDB=y
|
||||
CONFIG_MPC834x_MDS=y
|
||||
CONFIG_MPC834x_ITX=y
|
||||
CONFIG_MPC836x_MDS=y
|
||||
CONFIG_MPC836x_RDK=y
|
||||
|
|
|
|||
|
|
@ -46,7 +46,6 @@ CONFIG_PPC_83xx=y
|
|||
CONFIG_MPC831x_RDB=y
|
||||
CONFIG_MPC832x_MDS=y
|
||||
CONFIG_MPC832x_RDB=y
|
||||
CONFIG_MPC834x_MDS=y
|
||||
CONFIG_MPC834x_ITX=y
|
||||
CONFIG_MPC836x_MDS=y
|
||||
CONFIG_MPC836x_RDK=y
|
||||
|
|
|
|||
|
|
@ -39,18 +39,6 @@ config MPC832x_RDB
|
|||
help
|
||||
This option enables support for the MPC8323 RDB board.
|
||||
|
||||
config MPC834x_MDS
|
||||
bool "Freescale MPC834x MDS"
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_MPC834x
|
||||
help
|
||||
This option enables support for the MPC 834x MDS evaluation board.
|
||||
|
||||
Be aware that PCI buses can only function when MDS board is plugged
|
||||
into the PIB (Platform IO Board) board from Freescale which provide
|
||||
3 PCI slots. The PIBs PCI initialization is the bootloader's
|
||||
responsibility.
|
||||
|
||||
config MPC834x_ITX
|
||||
bool "Freescale MPC834x ITX"
|
||||
select DEFAULT_UIMAGE
|
||||
|
|
|
|||
|
|
@ -8,7 +8,6 @@ obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o
|
|||
obj-$(CONFIG_MPC830x_RDB) += mpc830x_rdb.o
|
||||
obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o
|
||||
obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
|
||||
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
|
||||
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
|
||||
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
|
||||
obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o
|
||||
|
|
|
|||
|
|
@ -1,92 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* arch/powerpc/platforms/83xx/mpc834x_mds.c
|
||||
*
|
||||
* MPC834x MDS board specific routines
|
||||
*
|
||||
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
|
||||
*/
|
||||
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kdev_t.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
#include <linux/atomic.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/ipic.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
|
||||
#include "mpc83xx.h"
|
||||
|
||||
#define BCSR5_INT_USB 0x02
|
||||
static int __init mpc834xemds_usb_cfg(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
void __iomem *bcsr_regs = NULL;
|
||||
u8 bcsr5;
|
||||
|
||||
mpc834x_usb_cfg();
|
||||
/* Map BCSR area */
|
||||
np = of_find_node_by_name(NULL, "bcsr");
|
||||
if (np) {
|
||||
struct resource res;
|
||||
|
||||
of_address_to_resource(np, 0, &res);
|
||||
bcsr_regs = ioremap(res.start, resource_size(&res));
|
||||
of_node_put(np);
|
||||
}
|
||||
if (!bcsr_regs)
|
||||
return -1;
|
||||
|
||||
/*
|
||||
* if Processor Board is plugged into PIB board,
|
||||
* force to use the PHY on Processor Board
|
||||
*/
|
||||
bcsr5 = in_8(bcsr_regs + 5);
|
||||
if (!(bcsr5 & BCSR5_INT_USB))
|
||||
out_8(bcsr_regs + 5, (bcsr5 | BCSR5_INT_USB));
|
||||
iounmap(bcsr_regs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ************************************************************************
|
||||
*
|
||||
* Setup the architecture
|
||||
*
|
||||
*/
|
||||
static void __init mpc834x_mds_setup_arch(void)
|
||||
{
|
||||
mpc83xx_setup_arch();
|
||||
|
||||
mpc834xemds_usb_cfg();
|
||||
}
|
||||
|
||||
machine_device_initcall(mpc834x_mds, mpc83xx_declare_of_platform_devices);
|
||||
|
||||
define_machine(mpc834x_mds) {
|
||||
.name = "MPC834x MDS",
|
||||
.compatible = "MPC834xMDS",
|
||||
.setup_arch = mpc834x_mds_setup_arch,
|
||||
.discover_phbs = mpc83xx_setup_pci,
|
||||
.init_IRQ = mpc83xx_ipic_init_IRQ,
|
||||
.get_irq = ipic_get_irq,
|
||||
.restart = mpc83xx_restart,
|
||||
.time_init = mpc83xx_time_init,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
Loading…
Reference in New Issue