ath11k: ce: remove CE_COUNT() macro
This macro is evil as it's accesses ab variable in a hidden way. It's better for readibility to access ab->hw_params.ce_count directly. This is done in a separate patch to keep the patches simple. No functional changes. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597576599-8857-6-git-send-email-kvalo@codeaurora.org
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@ -384,7 +384,7 @@ static void ath11k_ahb_kill_tasklets(struct ath11k_base *ab)
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{
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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@ -475,7 +475,7 @@ static void ath11k_ahb_sync_ce_irqs(struct ath11k_base *ab)
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int i;
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int irq_idx;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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@ -503,7 +503,7 @@ static void ath11k_ahb_ce_irqs_enable(struct ath11k_base *ab)
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{
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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ath11k_ahb_ce_irq_enable(ab, i);
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@ -514,7 +514,7 @@ static void ath11k_ahb_ce_irqs_disable(struct ath11k_base *ab)
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{
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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ath11k_ahb_ce_irq_disable(ab, i);
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@ -601,7 +601,7 @@ static void ath11k_ahb_free_irq(struct ath11k_base *ab)
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int irq_idx;
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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irq_idx = ATH11K_IRQ_CE0_OFFSET + i;
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@ -756,7 +756,7 @@ static int ath11k_ahb_config_irq(struct ath11k_base *ab)
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int ret;
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/* Configure CE irqs */
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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@ -718,7 +718,7 @@ void ath11k_ce_cleanup_pipes(struct ath11k_base *ab)
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struct ath11k_ce_pipe *pipe;
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int pipe_num;
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for (pipe_num = 0; pipe_num < CE_COUNT; pipe_num++) {
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for (pipe_num = 0; pipe_num < ab->hw_params.ce_count; pipe_num++) {
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pipe = &ab->ce.ce_pipe[pipe_num];
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ath11k_ce_rx_pipe_cleanup(pipe);
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@ -736,7 +736,7 @@ void ath11k_ce_rx_post_buf(struct ath11k_base *ab)
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int i;
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int ret;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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pipe = &ab->ce.ce_pipe[i];
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ret = ath11k_ce_rx_post_pipe(pipe);
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if (ret) {
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@ -767,7 +767,7 @@ int ath11k_ce_init_pipes(struct ath11k_base *ab)
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int i;
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int ret;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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pipe = &ab->ce.ce_pipe[i];
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if (pipe->src_ring) {
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@ -825,7 +825,7 @@ void ath11k_ce_free_pipes(struct ath11k_base *ab)
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int desc_sz;
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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pipe = &ab->ce.ce_pipe[i];
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if (pipe->src_ring) {
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@ -874,7 +874,7 @@ int ath11k_ce_alloc_pipes(struct ath11k_base *ab)
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spin_lock_init(&ab->ce.ce_lock);
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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attr = &ab->hw_params.host_ce_config[i];
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pipe = &ab->ce.ce_pipe[i];
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pipe->pipe_num = i;
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@ -914,7 +914,7 @@ void ath11k_ce_byte_swap(void *mem, u32 len)
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int ath11k_ce_get_attr_flags(struct ath11k_base *ab, int ce_id)
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{
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if (ce_id >= CE_COUNT)
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if (ce_id >= ab->hw_params.ce_count)
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return -EINVAL;
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return ab->hw_params.host_ce_config[ce_id].flags;
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@ -6,7 +6,6 @@
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#ifndef ATH11K_CE_H
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#define ATH11K_CE_H
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#define CE_COUNT (ab->hw_params.ce_count)
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#define CE_COUNT_MAX 12
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/* Byte swap data words */
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@ -1157,7 +1157,7 @@ void ath11k_hal_dump_srng_stats(struct ath11k_base *ab)
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int i;
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ath11k_err(ab, "Last interrupt received for each CE:\n");
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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ce_pipe = &ab->ce.ce_pipe[i];
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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@ -478,7 +478,7 @@ int ath11k_htc_wait_target(struct ath11k_htc *htc)
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if (!time_left) {
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ath11k_warn(ab, "failed to receive control response completion, polling..\n");
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for (i = 0; i < CE_COUNT; i++)
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for (i = 0; i < ab->hw_params.ce_count; i++)
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ath11k_ce_per_engine_service(htc->ab, i);
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time_left =
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@ -393,7 +393,7 @@ static void ath11k_pci_free_irq(struct ath11k_base *ab)
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{
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int i, irq_idx;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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irq_idx = ATH11K_PCI_IRQ_CE0_OFFSET + i;
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@ -421,7 +421,7 @@ static void ath11k_pci_ce_irqs_disable(struct ath11k_base *ab)
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{
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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ath11k_pci_ce_irq_disable(ab, i);
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@ -433,7 +433,7 @@ static void ath11k_pci_sync_ce_irqs(struct ath11k_base *ab)
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int i;
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int irq_idx;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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@ -477,7 +477,7 @@ static int ath11k_pci_config_irq(struct ath11k_base *ab)
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return ret;
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/* Configure CE irqs */
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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msi_data = (i % msi_data_count) + msi_irq_start;
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irq = ath11k_pci_get_msi_irq(ab->dev, msi_data);
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ce_pipe = &ab->ce.ce_pipe[i];
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@ -521,7 +521,7 @@ static void ath11k_pci_ce_irqs_enable(struct ath11k_base *ab)
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{
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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continue;
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ath11k_pci_ce_irq_enable(ab, i);
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@ -680,7 +680,7 @@ static void ath11k_pci_kill_tasklets(struct ath11k_base *ab)
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{
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int i;
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for (i = 0; i < CE_COUNT; i++) {
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for (i = 0; i < ab->hw_params.ce_count; i++) {
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struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
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if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
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